초록 ▼

A vertical cavity surface-emitting laser (VCSEL) package utilized as a laser reference for use in interferometry. The primary disadvantage of VCSELs, in terms of interferometry, has been found to be the relatively poor wavenumber stability of the beam. The present invention is a method and apparatus

A vertical cavity surface-emitting laser (VCSEL) package utilized as a laser reference for use in interferometry. The primary disadvantage of VCSELs, in terms of interferometry, has been found to be the relatively poor wavenumber stability of the beam. The present invention is a method and apparatus that makes viable a VCSEL package suitable for use as a reference in interferometry. The VCSEL package incorporates current control, temperature control and an algorithm for correcting wavenumber drift. The algorithm is derived from spectroscopic analysis of a reference sample having a known spectrum and comparing the generated spectrum to the known spectrum.

대표청구항 ▼

A vertical cavity surface-emitting laser (VCSEL) package utilized as a laser reference for use in interferometry. The primary disadvantage of VCSELs, in terms of interferometry, has been found to be the relatively poor wavenumber stability of the beam. The present invention is a method and apparatus

A vertical cavity surface-emitting laser (VCSEL) package utilized as a laser reference for use in interferometry. The primary disadvantage of VCSELs, in terms of interferometry, has been found to be the relatively poor wavenumber stability of the beam. The present invention is a method and apparatus that makes viable a VCSEL package suitable for use as a reference in interferometry. The VCSEL package incorporates current control, temperature control and an algorithm for correcting wavenumber drift. The algorithm is derived from spectroscopic analysis of a reference sample having a known spectrum and comparing the generated spectrum to the known spectrum. h values, Δ1and Δ2,respectively, such that Δ2=K·Δ1,wherein K is an integer. 3. The test structure according to claim 2, wherein the two different patterns have different values of duty cycles, D1and D2,respectively. 4. The test structure according to claim 1, wherein each of the at least two structures comprises at least one additional pattern zone comprising a pattern of spaced-apart metal regions, the two patterns of each structure being different and being located in the two pattern zones aligned in a spaced-apart relationship along a horizontal axis, such that the additional lower and the additional upper patterns are different, and the metal regions in the additional lower pattern are located underneath the spaces between the metal regions of the additional upper pattern. 5. The test structure according to claim 4, wherein the upper and lower structures of said at least one pair are identical and are shifted with respect to each other in a predetermined manner. 6. The test structure according to claim 5, wherein the upper and lower structure are rotated with respect to each other a 180°-angle. 7. The test structure according to claim 6, wherein pitches Δ1and Δ2and duty cycles D1and D2of the two patterns, respectively, in each of the upper and lower structures satisfy the following relationships: Δ2=K·Δ1; and D2=100%·(1-K·D1/100%), wherein K are integer numbers, thereby minimizing an overlap, along a horizontal axis, between the identical pattern zones of the upper and lower structures, and improving the optical isolation of the lower structure. 8. The test structure according to claim 1, wherein the upper and lower patterns have different pitch values and equal values of duty cycles, the upper and lower structures being shifted with respect to each other along a horizontal axis by half the pattern period, thereby minimizing an overlap, along a horizontal axis, between the upper and lower pattern zones and improving the optical isolation of the lower pattern structure. 9. The test structure according to claim 1, wherein upper and lower patterns in the upper and lower pattern zones, respectively, are different in that they are aligned along two mutually perpendicular horizontal axes, such that the metal regions in the upper and lower patterns are perpendicular to each other. 10. The test structure according to claim 1, and also comprising at least one additional pattern zone comprising a pattern of spaced-apart metal regions, the three patterns being located in three spaced-apart layers presenting three structures, respectively, aligned in a spaced-apart relationship along the vertical axis, a construction being such that the patterns in each two locally adjacent structures are different and are oriented with respect to each other such that the metal regions of the lower pattern are located underneath the spaces between the metal regions of the upper pattern. 11. A patterned structure that has a pattern area formed by spaced-apart metal-containing regions representative of real features of the patterned structure, and is formed with a test site containing a test structure, which comprises at least one pair of structures arranged in a spaced-apart relationship along a vertical axis, each of said structures comprising at least one pattern zone containing spaced-apart metal regions, the test structure thereby comprising at least one pair of vertically aligned upper and lower pattern zones, the upper and lower pattern zones in each pair having different patterns oriented with respect to each other such that the metal regions of the lower pattern are located underneath the spaces between the metal regions of the upper pattern, said upper pattern zone being disposed as a top layer of said test structure. 12. The patterned structure according to claim 11, being a sem iconductor wafer progressing on a production line in a process of manufacturing semiconductor devices, the upper and lower structures of the test structure being spaced by a dielectric layer, and the metal regions in the pattern zone being spaced by dielectric regions. 13. The patterned structure according to claim 11, wherein each of the at least two structures of the test structure comprises at least one additional pattern zone comprising a pattern of spaced-apart metal regions, the two patterns of each structure being different and being located in the two pattern zones aligned in a spaced-apart relationship along a horizontal axis, such that the additional lower and the additional upper patterns are different, and the metal regions in the additional lower pattern are located underneath the spaces between the metal regions of the additional upper pattern. 14. The patterned structure according to claim 12, being a semiconductor wafer progressing on a production line in a process of manufacturing semiconductor device, the upper and lower structures of the test structure being spaced by a dielectric layer, the metal regions in the pattern zone being spaced by dielectric regions, and the pattern zones in each of the upper and lower structures being spaced by a dielectric zone. 15. A method of controlling a process of Chemical Mechanical Planarization (CMP) applied to a group of similar patterned structures progressing on a production line, each pattern structure having a pattern area formed by spaced-apart metal-containing regions representative of real features of the patterned structure, the method comprising the steps of: (a) forming at least one of the patterned structures progressing on a production line with a test site containing a test structure, which comprises at least one pair of structures arranged in a spaced-apart relationship along a vertical axis, each of said structures comprising at least one pattern zone containing spaced-apart metal regions, the test structure thereby comprising at least one pair of vertically aligned upper and lower pattern zones, the upper and lower pattern zones in each pair having different patterns oriented with respect to each other such that the metal regions of the lower pattern are located underneath the spaces between the metal regions of the upper pattern, said upper pattern zone being disposed as a top layer of said test structure; (b) applying the CMP process to the test site, thereby processing both the test structure and the pattern area; (c) applying optical measurements to the processed test structure to detect an optical response of the test structure, wherein the optical response is substantially not affected by a light response of layers of the test structure located underneath the lower structure; (d) analyzing the detected optical response to determine whether there exists at least one of erosion and dishing effects caused by the CMP processing, the analysis of the optical response enabling to adjust a working parameter of the CMP process prior to applying the CMP process to another patterned structure. 16. The method according to claim 15, wherein step (i) comprising the step of forming each of the at least two structures of the test structure with at least one additional pattern zone comprising a pattern of spaced-apart metal regions, the two patterns of each structure being different and being located in the two pattern zones aligned in a spaced-apart relationship along a horizontal axis and being spaced by a dielectric zone, such that the additional lower and the additional upper patterns are different, the metal regions in the additional lower pattern being located underneath the spaces between the metal regions of the additional upper pattern. 17. The method according to claim 15, wherein measurement results include information on at least one of the following: erosion effect, local dishing effect, and metal regions thickness. 18. The method according to c