초록 ▼

A method and apparatus for efficiently selecting cells within a circuit design database. The invention includes four primary features for selecting cells including (1) selecting only those cells that are in a pre-identified region and within a pre-identified selection area; (2) maneuvering through t

A method and apparatus for efficiently selecting cells within a circuit design database. The invention includes four primary features for selecting cells including (1) selecting only those cells that are in a pre-identified region and within a pre-identified selection area; (2) maneuvering through the circuit design hierarchy and selecting cells or regions at selected levels of hierarchy by using predetermined up and down hot-keys; (3) sorting selected cells by instance name, and manually selecting a desired cell or region from the resulting sorted list; and (4) sorting selected cells by a corresponding net name, and manually selecting a desired cell or region from the resulting sorted list.

대표청구항 ▼

A method and apparatus for efficiently selecting cells within a circuit design database. The invention includes four primary features for selecting cells including (1) selecting only those cells that are in a pre-identified region and within a pre-identified selection area; (2) maneuvering through t

A method and apparatus for efficiently selecting cells within a circuit design database. The invention includes four primary features for selecting cells including (1) selecting only those cells that are in a pre-identified region and within a pre-identified selection area; (2) maneuvering through the circuit design hierarchy and selecting cells or regions at selected levels of hierarchy by using predetermined up and down hot-keys; (3) sorting selected cells by instance name, and manually selecting a desired cell or region from the resulting sorted list; and (4) sorting selected cells by a corresponding net name, and manually selecting a desired cell or region from the resulting sorted list. the quality of a simulation model for the DUT (device under test) with dynamic constraint solving and test generation for the testing and verification process. The present invention provides such dynamic constraint solving through the creation of a sequence of instructions in a "generator mini-language" (GML). These instructions are then executed in order to provide a correct random solution to any given set of dynamic constraints. The process of execution is preferably performed by a constraint resolution engine, optionally and more preferably implemented as software, which manages the requirements imposed by the constraints on the execution, while simultaneously enabling a random solution to the set of constraints to be provided. Such a constraint resolution engine may optionally be viewed as a type of state machine, in which individual elements of the state machine are more preferably represented by one or more dynamic graph(s). 7821, 19990200, Ballantyne et al.; US-5870552, 19990200, Dozier et al.; US-5870724, 19990200, Lawlor et al.; US-5873099, 19990200, Hogan et al.; US-5884292, 19990300, Baker et al.; US-5889863, 19990300, Weber; US-5931917, 19990800, Nguyen et al.; US-5933816, 19990800, Zeanah et al.; US-RE36310, 19990900, Bjerrum et al.; US-5953731, 19990900, Glaser; US-5960216, 19990900, Vishlitzky et al.; US-5963205, 19991000, Sotomayor; US-5973731, 19991000, Schwab; US-5978569, 19991100, Traeger; US-5978773, 19991100, Hudetz et al.; US-5982891, 19991100, Ginter et al.; US-5983004, 19991100, Shaw et al.; US-5987312, 19991100, Dekker; US-5996076, 19991100, Rowney et al.; US-6085224, 20000700, Wagner; US-6112191, 20000800, Burke; US-6175922, 20010100, Wang; US-6182052, 20010100, Fulton et al.; US-6205437, 20010300, Gifford; US-6208904, 20010300, Mullen, Jr.; US-6212575, 20010400, Cleron et al.; US-6226744, 20010500, Murphy et al.; US-6226752, 20010500, Gupta et al.; US-6253027, 20010600, Weber et al.; US-6275869, 20010800, Sieffert et al.; US-6279112, 20010800, O'Toole, Jr. et al.; US-6282656, 20010800, Wang; US-6283375, 20010900, Wilz, Sr. et al.; US-6314456, 20011100, Van Andel et al.