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특허 상세정보

Fabrication method of semiconductor integrated circuit device and its testing apparatus

국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판) G01R-031/02    H01L-021/66   
미국특허분류(USC) 324/760; 324/754; 438/017
출원번호 US-0964708 (2001-09-28)
우선권정보 JP-0304099 (2000-10-03)
발명자 / 주소
출원인 / 주소
대리인 / 주소
    Antonelli, Terry, Stout & Kraus, LLP
인용정보 피인용 횟수 : 36  인용 특허 : 4
초록

A testing apparatus and a fabricating method of a semiconductor integrated circuit device for reducing the fabrication cost by placing, in the wafer level burn-in, divided contactors in equally contact with the full surface of wafer, enabling repair of each contactor and improving the yield of contactors. The cassette structure of the mechanical pressurizing system in the testing apparatus is structured with a plurality of divided silicon contactor blocks and a guide frame for integrating these blocks and employs the wafer full surface simultaneous conta...

대표
청구항

1. A semiconductor integrated circuit device fabrication method comprising: performing an electrical test to a plurality of wafer surface regions over a major surface of a wafer, each of said plurality of wafer surface regions including a plurality of chip regions, using a plate holding structure integrally holding a plurality of wiring/stylus composite plates, each of said wiring/stylus composite plates including a first wiring film structure having a plurality of test stylus sections electrically connected thereto, each of the test stylus sections h...

이 특허를 인용한 특허 피인용횟수: 36

  1. Mott, Lawrence; Bettger, Kenneth; Brown, Elliot. Asymmetrical flexible edge seal for vacuum insulating glass. USP2012108283023.
  2. Kuo, Nick; Chou, Chiu-Ming; Chou, Chien-Kang; Lin, Chu-Fu. Chip structure with bumps and testing pads. USP2010127855461.
  3. Fuchigami, Hiroyuki; Satou, Shouichirou. Continuity testing apparatus and continuity testing method including open/short detection circuit. USP2012118310246.
  4. Lee, Kang Youl; Chun, Jun Hyun. Counting circuit for controlling an off-chip driver and method of changing and output current value of the off-chip driver using the same. USP2009057537942.
  5. Rumsey,Robert W.. Electrical field alignment vernier. USP2006016984531.
  6. Wada,Yuji; Kasukabe,Susumu; Hasebe,Takehiko; Narizuka,Yasunori; Yabushita,Akira; Mori,Terutaka; Hasebe,Akio; Motoyama,Yasuhiro; Shoji,Teruo; Sueyoshi,Masakazu. Fabrication method of semiconductor integrated circuit device. USP2008047351597.
  7. Wada,Yuji; Kasukabe,Susumu; Hasebe,Takehiko; Narizuka,Yasunori; Yabushita,Akira; Mori,Terutaka; Hasebe,Akio; Motoyama,Yasuhiro; Shoji,Teruo; Sueyoshi,Masakazu. Fabrication method of semiconductor integrated circuit device. USP2007057219422.
  8. Bettger, Kenneth J.; Stark, David H.. Filament-strung stand-off elements for maintaining pane separation in vacuum insulating glazing units. USP2013088512830.
  9. Bettger, Kenneth J.; Stark, David H.. Flexible edge seal for vacuum insulating glazing units. USP2012128329267.
  10. Stark, David H.. Hermetically sealed micro-device package using cold-gas dynamic spray material deposition. USP2005086924974.
  11. Stark,David H.. Hermetically sealed micro-device package with window. USP2007077238546.
  12. Stark, David H. Insulated glazing units. USP2010117832177.
  13. Stark, David H.. Insulating glass unit having multi-height internal standoffs and visible decoration. USP2011087989040.
  14. Francis, IV, William H.; Freebury, Gregg E.; Beidleman, Neal J.; Hulse, Michael. Method and apparatus for an insulating glazing unit and compliant seal for an insulating glazing unit. USP2016059328512.
  15. Di Stefano, Thomas H.. Method and apparatus for holding microelectronic devices. USP2013078485511.
  16. Di Stefano, Thomas H.. Method and apparatus for holding microelectronic devices. USP2013108550443.
  17. Wasserbauer,John; Feld,Stewart A.. Method and apparatus for performing whole wafer burn-in. USP2006117138284.
  18. Ohtaki,Mikio. Method for manufacturing and testing semiconductor devices on a resin-coated wafer. USP2007087262610.
  19. Di Stefano, Thomas H.. Method for stacking microelectronic devices. USP2014048683674.
  20. Ohtaki, Mikio. Method of testing circuit elements on a semiconductor wafer. USP2009127639027.
  21. Kim, Dong Il; Song, Byung Chang; Jeong, Ha Poong. Micro-cantilever type probe card. USP2005106956386.
  22. Miller, Seth A.; Stark, David H.; Francis, IV, William H.; Puligandla, Viswanadham; Boulos, Edward N.; Pernicka, John. Multi-pane glass unit having seal with adhesive and hermetic coating layer. USP2015028950162.
  23. Jun, Tae-Un. Needle assembly of probe card. USP2005076922069.
  24. Di Stefano, Thomas H.. Precision carrier for microelectronic devices. USP2016059346151.
  25. Root, Bryan J.. Probe tile for probing semiconductor wafer. USP2010087786743.
  26. Root,Bryan J.. Probe tile for probing semiconductor wafer. USP2008037345494.
  27. Root, Bryan J.; Funk, William A.. Replaceable probe apparatus for probing semiconductor wafer. USP2010067728609.
  28. Root, Bryan J.; Funk, William A.. Replaceable probe apparatus for probing semiconductor wafer. USP2009127626404.
  29. Root, Bryan J.; Funk, William A.. Replaceable probe apparatus for probing semiconductor wafer. USP2013018354856.
  30. Root, Bryan J.; Funk, William A.. Replaceable probe apparatus for probing semiconductor wafer. USP2011087999564.
  31. Saitoh, Yoshikazu; Morita, Sadayuki; Sonoda, Takahiro. Semiconductor wafer, semiconductor chip, and manufacturing method of semiconductor device. USP2005046885599.
  32. Pourkeramati, Ali; Park, Eungjoon. Structure and method for parallel testing of dies on a semiconductor wafer. USP2010087781890.
  33. Pourkeramati,Ali; Park,Eungjoon. Structure and method for parallel testing of dies on a semiconductor wafer. USP2007027173444.
  34. Piper, Daniel. Test structure and method for determining overlay accuracy in semiconductor devices using resistance measurement. USP2016029252202.
  35. Piper, Daniel. Test structure for determining overlay accuracy in semiconductor devices using resistance measurement. USP2017029564382.
  36. Stark, David H.. Wafer-level hermetic micro-device packages. USP2009047517712.