IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
US-0587338
(2000-06-05)
|
우선권정보 |
JP-0159754 (1999-06-07) |
발명자
/ 주소 |
- Kunimatsu, Yoshimasa
- Nagasaka, Chikao
- Nishikawa, Masato
|
출원인 / 주소 |
- Kabushiki Kaisha Tokai-Rika-Denki-Seisakusho
|
대리인 / 주소 |
|
인용정보 |
피인용 횟수 :
20 인용 특허 :
10 |
초록
▼
The present invention provides a touch control position determining method which allows the touch control position to be determined precisely regardless of the modes of control. When a touch control is made on an input pad, it is confirmed whether or not the upper and lower vertical position detecti
The present invention provides a touch control position determining method which allows the touch control position to be determined precisely regardless of the modes of control. When a touch control is made on an input pad, it is confirmed whether or not the upper and lower vertical position detecting lines are in the non-detected state in which infrared rays are not intercepted to determine whether the touch control position is located at the upper side, the center or the lower side (Steps 100 through 112). Next, it is confirmed whether or not the right and next horizontal position detecting lines are in the non-detected state to determine whether the touch control position along the horizontal direction is located at the left side, the center or the right side (Steps 114 through 122). Thus, the touch control position in the vertical and horizontal directions is determined and the determination result is outputted (Step 124).
대표청구항
▼
The present invention provides a touch control position determining method which allows the touch control position to be determined precisely regardless of the modes of control. When a touch control is made on an input pad, it is confirmed whether or not the upper and lower vertical position detecti
The present invention provides a touch control position determining method which allows the touch control position to be determined precisely regardless of the modes of control. When a touch control is made on an input pad, it is confirmed whether or not the upper and lower vertical position detecting lines are in the non-detected state in which infrared rays are not intercepted to determine whether the touch control position is located at the upper side, the center or the lower side (Steps 100 through 112). Next, it is confirmed whether or not the right and next horizontal position detecting lines are in the non-detected state to determine whether the touch control position along the horizontal direction is located at the left side, the center or the right side (Steps 114 through 122). Thus, the touch control position in the vertical and horizontal directions is determined and the determination result is outputted (Step 124). the two gate lines provided on either side of said pixel, are alternatively performed each time a field cycle switches. 5. An active matrix type liquid crystal display device according to claim 3, comprising: gate drivers for sequentially outputting gate voltage from output terminals in each field cycle; and demultiplexers wherein an action of sequentially supplying gate voltage to one of the two gate lines provided on either side of said pixel, and an action of sequentially supplying gate voltage to the other of the two gate lines provided on either side of said pixel, are alternatively performed each time a field cycle switches, said gate voltage being sequentially output from the output terminals of said gate drivers; wherein said demultiplexer and said pixel are manufactured by the same manufacturing process. 6. An active matrix type liquid crystal display device according to claim 4, comprising: a first shift register which sequentially shifts first start pulses and supplies output signals from each stage as gate voltage to one of the two gate lines provided on either side of each of said pixel electrodes; and a second shift register which sequentially shifts second start pulses and supplies output signals from each stage as gate voltage to the other of the two gate lines provided on either side of each of said pixel electrodes; wherein said first and second shift registers, and said pixel are manufactured by the same manufacturing process. 7. An active matrix type liquid crystal display device according to claim 3, wherein, in said substrate, the gate electrodes forming said thin-film transistors are comprised of the corresponding gate lines themselves; and wherein the drain electrodes traverse said gate electrodes in a direction orthogonal to said gate electrodes. 8. An active matrix type liquid crystal display device according to claim 1, wherein each pair of thin-film transistors disposed in said region formed between said neighboring data lines and between the two gate lines on either side of each of said pixel electrodes are connected to the same gate line, and wherein said thin-film transistors disposed along a row parallel to said data lines are connected to alternating gate lines. 9. An active matrix type liquid crystal display device according to claim 1, wherein each pair of thin-film transistors disposed in said region formed between said neighboring data lines and between the two gate lines on either side of each of said pixel electrodes are connected to opposite gate lines, and wherein said thin-film transistors disposed along a row parallel to said data lines are connected to non-alternating gate lines. 10. An active matrix type liquid crystal display device according to claim 1, wherein each pair of thin-film transistors disposed in said region formed between said neighboring data lines and between the two gate lines on either side of each of said pixel electrodes are connected to opposite gate lines, and wherein said thin-film transistors disposed along a row parallel to said data lines are connected to alternating gate lines. 11. An active matrix type liquid crystal display device according to claim 1, wherein each pair of thin-film transistors disposed in said region formed between said neighboring data lines and between the two gate lines on either side of each of said pixel electrodes are connected to the same gate line, and wherein said thin-film transistors disposed along a row parallel to said data lines are connected to non-alternating gate lines. 12. An active matrix type liquid crystal display device according to claim 1, wherein an island formed between the source electrode and the drain electrode has a substantially smaller width than the gate line formed beneath the island. 13. An active matrix type liquid crystal display device according to claim 1, wherein an island formed between the source electrode and the drain electrode has a substantially larger width than the gate line formed beneath the island. 14. An active matrix type liquid crystal display device according to claim 1, wherein a portion of the drain electrode traversing the gate line is substantially thinner than a portion of the drain electrode electrically connected with the pixel electrode. 15. An active matrix type liquid crystal display device according to claim 4, wherein a signal voltage is output to each data line such that the signal voltage is applied to the neighboring data lines with the polarity thereof inverted. 16. An active matrix type liquid crystal display device substrate comprising: a plurality of data lines and a plurality of gate lines provided on a substrate and arranged in a matrix; thin-film transistors and pixel electrodes provided on either side of each of the data lines, the pixel electrodes and the data lines connected with the thin-film transistors, each thin-film transistor including a source electrode, a gate electrode integral with the one of the two gate lines on either side of the associated pixel electrode, and a drain electrode connected with the associated pixel electrode, the gate electrodes extending in a direction parallel with the data lines, each data line controlling pixel electrodes on either side of the data line using signals from one of the two gate lines on either side of the associated pixel electrode; a storing capacity line disposed between neighboring data lines and neighboring pixel electrodes and parallel to the data lines; and a storing capacity corresponding to each pixel electrode, the storing capacity having a first electrode connected to with the pixel electrode corresponding thereto and a second electrode connected with the associated storing capacity line, wherein the pixel electrodes between neighboring data lines and neighboring gate lines have a common storing capacity line. 17. An active matrix type liquid crystal display device according to claim 16, wherein each pair of thin-film transistors disposed in a region formed between the neighboring data lines and between the two gate lines on either side of each of the pixel electrodes are connected to the same gate line, and wherein the thin-film transistors disposed along a row parallel to the data lines are connected to alternating gate lines. 18. An active matrix type liquid crystal display device according to claim 16, wherein each pair of thin-film transistors disposed in a region formed between the neighboring data lines and between the two gate lines on either side of each of the pixel electrodes are connected to opposite gate lines, and wherein the thin-film transistors disposed along a row parallel to the data lines are connected to non-alternating gate lines. 19. An active matrix type liquid crystal display device according to claim 16, wherein each pair of thin-film transistors disposed in the region formed between the neighboring data lines and between the two gate lines on either side of each of the pixel electrodes are connected to opposite gate lines, and wherein the thin-film transistors disposed along a row parallel to the data lines are connected to alternating gate lines. 20. An active matrix type liquid crystal display device according to claim 16, wherein each pair of thin-film transistors disposed in the region formed between the neighboring data lines and between the two gate lines on either side of each of the pixel electrodes are connected to the same gate line, and wherein the thin-film transistors disposed along a row parallel to the data lines are connected to non-alternating gate lines. 21. An active matrix type liquid crystal display device according to claim 16, wherein an island formed between the source electrode and the drain electrode has a substantially smaller width than the gate line formed beneath the island. 22. An active matrix type liquid crystal display device according to claim 16, wherein an island formed between the source electrode and the drain el
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