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Precoders and their corresponding logic schemes, together with a method of using the precoders and their schemes to generate a media code sequence of symbols for data storage channels, with partial response equalization and a multilevel encoding/modulation scheme. Partial responses are defined by th

Precoders and their corresponding logic schemes, together with a method of using the precoders and their schemes to generate a media code sequence of symbols for data storage channels, with partial response equalization and a multilevel encoding/modulation scheme. Partial responses are defined by the classical and modified target polynomials, while the multilevel encoding/modulation schemes include: 1) Structured Set Partitions (SSP), 2) a set of conventional block codes with different error correcting capabilities, and 3) a variety of iterative decoding such as the List Trellis Decoder (LTD), the BCJR algorithm, and soft decoding of low-density parity check codes. The precoders are derived from the SSP's, and combined with conventional ECC encoders designed for error detection, or error correction, or both. A cascade of parallel ECC encoders, followed by an SSP precoder, increases the minimum Euclidean distance between different media code sequences of symbols, and as a result gives lower bit error rates after decoding.

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Precoders and their corresponding logic schemes, together with a method of using the precoders and their schemes to generate a media code sequence of symbols for data storage channels, with partial response equalization and a multilevel encoding/modulation scheme. Partial responses are defined by th

Precoders and their corresponding logic schemes, together with a method of using the precoders and their schemes to generate a media code sequence of symbols for data storage channels, with partial response equalization and a multilevel encoding/modulation scheme. Partial responses are defined by the classical and modified target polynomials, while the multilevel encoding/modulation schemes include: 1) Structured Set Partitions (SSP), 2) a set of conventional block codes with different error correcting capabilities, and 3) a variety of iterative decoding such as the List Trellis Decoder (LTD), the BCJR algorithm, and soft decoding of low-density parity check codes. The precoders are derived from the SSP's, and combined with conventional ECC encoders designed for error detection, or error correction, or both. A cascade of parallel ECC encoders, followed by an SSP precoder, increases the minimum Euclidean distance between different media code sequences of symbols, and as a result gives lower bit error rates after decoding. at will expire before the time values associated with other slots including timers determining a current time; determining, in response to decrementing the decrement register to zero, a slot having a time value that expires at the determined current time; and dequeueing all timers in the determined slot having a timeout value expiring at the current time. 3. The method of claim 1, wherein enqueuing the timer further comprises: determining a slot in one wheel having a time value that includes the timeout value associated with the timer, wherein the timer is enqueued in the determined slot. 4. The method of claim 3, wherein a first wheel includes one slot for each time value, and wherein a second wheel includes slots that each include a number of time values equal to all the slots in the first wheel. 5. The method of claim 4, wherein a third wheel comprises an overflow wheel that includes slots that each include a number of time values equal to all the slots in the second wheel, and wherein the overflow wheel slots are capable of including timers having timeout values that remain in the overflow wheel more than one rotation of the overflow wheel. 6. The method of claim 5, wherein determining the slot in the overflow wheel capable of including the timeout value associated with the timer comprises: determining whether the timeout value for the timer being enqueued exceeds a time value for one complete rotation of the overflow wheel; and enqueuing the timer in the slot that is one rotation a way from the slot in the overflow wheel associated with the determined current time. 7. A method for managing timers in timing wheel data structures implemented in a computer readable medium, comprising: enqueueing each timer in one slot in one of multiple timing wheels, wherein each timing wheel includes multiple slots, wherein each slot is associated with a time value, wherein each slot is capable of queuing one or more timers, and wherein each timer indicates a timeout value at which the timer expires, indicating in an earliest timer data structure an earliest timeout value of one timer enqueued in one slot of one of the wheels, wherein the earliest timer data structure is used to determine the slot associated with a time value that expires at the determined current time decrementing a decrement register to zero; determining a current time; determining, in response to decrementing the decrement resister to zero a slot having a time value that expires at the determined current time; and dequeueing all timers in the determined slot having a timeout value expiring at the current time. 8. The method of claim 7, further comprising: determining one slot including at least one timer that is associated with a time value that expires before the time values associated with all other slots including at least one timer after dequeueing one or more timers; and setting the earliest timeout value in the earliest timer data structure to the time value associated with the determined slot. 9. The method of claim 8, further comprising: resetting the decrement register to the earliest timeout value set in the earliest timer data structure. 10. The method of claim 7, further comprising: receiving a call to stop one subject timer; removing the subject timer from one slot in one timing wheel; determining a slot including a timer associated with a time value that expires before the time value of any other slot if the time value associated with the slot from which the subject timer was removed is indicated as the earliest timeout value; and setting the earliest time value in the earliest timer data structure to the time value associated with the determined slot. 11. The method of claim 10, further comprising: returning a handle to a program requesting an enqueued timer, wherein the handle includes a pointer to the enqueued timer, and wherein the program uses the handle with a call to stop the enqueued timer. 12. A sy stem for managing timers, comprising: a processor; a memory device, wherein the processor is capable of accessing the memory device; a decrement register, wherein the processor is capable of accessing the register; a system clock; a plurality of timing wheel data structures implemented in the memory device, wherein each timing wheel includes multiple slots, wherein each slot is associated with a time value, wherein each slot is capable of queuing one or more timers, and wherein each timer indicates a timeout value at which the timer expires; program logic embedded in a computer readable medium including code capable of causing the processor to perform: (i) enqueueing each timer in one slot in one of multiple timing wheels; (ii) decrementing the decrement register to zero; (iii) determining a current time from the system clock; (iv) determining, in response to decrementing the decrement register to zero, a slot having a time value that expires at the determined current time; and (v) dequeueing all timers in the determined slot having a timeout value expiring at the current time. 13. A system for managing timers, comprising: a processor: a memory device, wherein the processor is capable of accessing the memory device; a decrement register, wherein the processor is capable of accessing the register; a system clock; a plurality of timing wheel data structures implemented in the memory device, wherein each timing wheel includes multiple slots, wherein each slot is associated with a time value, wherein each slot is capable of queuing one or more timers, and wherein each timer indicates a timeout value at which the timer expires; program logic embedded in a computer readable medium including code capable of causing the processor to perform: (i) enqueueing each timer in one slot in one of multiple timing wheels; (ii) setting the decrement register to a time value associated with one slot including at least one timer that will expire before the time values associated with other slots including timers (iii) decrementing the decrement register to zero; (iv) determining a current time from the system clock; (v) determining, in response to decrementing the decrement register to zero, a slot having a time value that expires at the determined current time; and (vi) dequeueing all timers in the determined slot having a timeout value expiring at the current time. 14. The system of claim 12, wherein enqueuing the timer further comprises: determining a slot in one wheel having a time value that includes the timeout value associated with the timer, wherein the timer is enqueued in the determined slot. 15. The system of claim 14, wherein a first wheel includes one slot for each time value, and wherein a second wheel includes slots that each include a number of time values equal to all the slots in the first wheel. 16. The system of claim 15, wherein a third wheel comprises an overflow wheel that includes slots that each include a number of time values equal to all the slots in the second wheel, and wherein the overflow wheel slots are capable of including timers having timeout values that remain in the overflow wheel more than one rotation of the overflow wheel. 17. The system of claim 16, wherein determining the slot in the overflow wheel capable of including the timeout value associated with the timer comprises: determining whether the timeout value for the timer being enqueued exceeds a time value for one complete rotation of the overflow wheel; and enqueuing the timer in the slot that is one rotation a way from the slot in the overflow wheel associated with the determined current time. 18. A system for managing timers, comprising: a processor; a memory device, wherein the processor is capable of accessing the memory device; a decrement register, wherein the processor is capable of accessing the register; a system clock; a plurality of timing wheel data structures implemented in the memory de