초록 ▼

A method and system for generating workflow messages based on adding annotations to a file repository or database independent of an original document that they annotate. By separately storing the annotations in a searchable annotation repository, original documents can be preserved unchanged while s

A method and system for generating workflow messages based on adding annotations to a file repository or database independent of an original document that they annotate. By separately storing the annotations in a searchable annotation repository, original documents can be preserved unchanged while still providing the ability to comment on the original document. By generating workflow messages, a system can track who has reviewed a document, whose proposed changes and/or comments require action by another person, and if everyone has reviewed the documents within the time constraints established.

대표청구항 ▼

A method and system for generating workflow messages based on adding annotations to a file repository or database independent of an original document that they annotate. By separately storing the annotations in a searchable annotation repository, original documents can be preserved unchanged while s

A method and system for generating workflow messages based on adding annotations to a file repository or database independent of an original document that they annotate. By separately storing the annotations in a searchable annotation repository, original documents can be preserved unchanged while still providing the ability to comment on the original document. By generating workflow messages, a system can track who has reviewed a document, whose proposed changes and/or comments require action by another person, and if everyone has reviewed the documents within the time constraints established. rators. 4. The device as claimed in claim 1, wherein the selection circuit generates a select signal for randomly selecting the PN generators. 5. The device as claimed in claim 1, wherein an initial state value of the PN generators is set to a state value satisfied by comparing a minimum weight determined by turbo encoding a predetermined input word for every case with a predetermined threshold value. 6. A device for generating L addresses, which are smaller in number than 2m×Ngvirtual addresses, for reading data from an interleaver memory in which L data bits are stored, the device comprising: is NgPN generators each including m memories; an address generator for adding an offset value to the input data size to provide a virtual address having a size of a multiple of 2m,and generating addresses other than addresses corresponding to the offset value in address generation areas using the address generation areas having the size of 2m; and means for reading the input data from the interleaver memory using random addresses generated from the address generation areas. 7. The device as claimed in claim 6, wherein the address generator comprises: a selection circuit including said NgPN (Pseudo Noise) generators, wherein one of the PN generators generates (OSV-1) offset values satisfying OSV=2m×Ng-L and (2m-OSV) non-zero states in response to a first clock signal and the other PN generators each generate (2m-1) non-zero states, wherein the selection circuit selects the PN generators according to a predetermined order in response to a select signal and outputs a state generated from the selected PN generator; means for detecting each offset state from one PN generator, providing said select signal for not selecting said one PN generator so that the detected offset state is not output, and generating high address bits related to each selection of the PN generators in response to clock pulses of a second clock signal having a shorter period than the first clock signal; means for generating low address bits determined by subtracting one from each state output from the selection circuit when a number of selection periods of the PN generators is smaller than 2m,and generating low address bits corresponding to 2m-1 when the number of selection periods is 2m; and an address buffer for storing the addresses, said L addresses each being comprised of the high address bits and the low address bits. 8. The device as claimed in claim 7, wherein the OSV is a minimum value which is added such that when a size of the input data is converted to a binary value, a number of consecutive zero bits from the least significant bit (LSB) is at least one. 9. The device as claimed in claim 7, wherein the selection circuit generates a select signal for sequentially selecting the PN generators. 10. The device as claimed in claim 7, wherein the selection circuit generates a select signal for randomly selecting the PN generators. 11. The device as claimed in claim 7, wherein an initial state value of the PN generators is set to a state value satisfied by comparing a minimum weight determined by turbo encoding a predetermined input word for every case with a predetermined threshold value. 12. A method for generating L addresses, which are smaller in number than 2m×Ngvirtual addresses, for reading data from an interleaver memory in which L data bits are stored, the method comprising the steps of: generating, in one of NgPN generators, (OSV-1) offset values (OSV) satisfying OSV=2m×Ng-L and (2m-OSV) non-zero states; generating, in each of the other PN generators, (2m-1) non-zero states; detecting each offset state from said one PN generator, and generating a select signal having a selection period for skipping selection of said o