IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
US-0185786
(2002-06-27)
|
발명자
/ 주소 |
|
대리인 / 주소 |
|
인용정보 |
피인용 횟수 :
8 인용 특허 :
9 |
초록
▼
An automatic reminder alarm for a recreational equipment vehicle rack comprising a transmitter placed in proximity of a garage, a receiver located inside the car, an alarm connected to and triggered by the receiver, and an actuating device that automatically activates the receiver when recreational
An automatic reminder alarm for a recreational equipment vehicle rack comprising a transmitter placed in proximity of a garage, a receiver located inside the car, an alarm connected to and triggered by the receiver, and an actuating device that automatically activates the receiver when recreational equipment is mounted in the vehicle rack. The receiver triggers the alarm when the receiver is in range of the transmitter and the actuator has activated the receiver.
대표청구항
▼
An automatic reminder alarm for a recreational equipment vehicle rack comprising a transmitter placed in proximity of a garage, a receiver located inside the car, an alarm connected to and triggered by the receiver, and an actuating device that automatically activates the receiver when recreational
An automatic reminder alarm for a recreational equipment vehicle rack comprising a transmitter placed in proximity of a garage, a receiver located inside the car, an alarm connected to and triggered by the receiver, and an actuating device that automatically activates the receiver when recreational equipment is mounted in the vehicle rack. The receiver triggers the alarm when the receiver is in range of the transmitter and the actuator has activated the receiver. efined voltage value is the sum of a voltage at said second node and a voltage across said first resistor at said peak current value.11. The circuit of claim 2, wherein said bandgap reference circuit comprises: a first resistor and a second resistor connected in series between said first node and a second node; a first transistor having a first current handling terminal and a control terminal both coupled to said second node, and a second current handling terminal coupled to a first supply voltage, said first transistor generating a base-to-emitter voltage at said second node; and a differential amplifier comprising a second transistor and a third transistor, said second and third transistors having unequal current densities and generating a &Dgr;V BEvoltage across said second resistor; wherein said base-to-emitter voltage at said second node is summed with a multiple of said &Dgr;V BEvoltage to generate said bandgap voltage.12. The circuit of claim 11, wherein said differential amplifier further comprises a current mirror coupled between said first node and said second and third transistors and a fourth transistor coupled to said second and third transistors providing a bias current.13. The circuit of claim 11, wherein said differential amplifier comprises: said second transistor having a first current handling terminal coupled to a third node, a second current handling terminal coupled to a fourth node, and a control terminal coupled to an intermediate node between said first and second resistors; said third transistor having a first current handling terminal coupled to a fifth node, a second current handling terminal coupled to said fourth node, and a control terminal coupled to said second node; a fourth transistor having a first current handling terminal coupled to said fourth node, a second current handling terminal coupled to said first supply voltage, and a control terminal coupled to said control terminal of said first transistor; a fifth transistor having a first current handling terminal coupled to said fifth node, a second current handling terminal coupled to said first node, and a control terminal coupled to said third node; and a sixth transistor having a first current handling terminal and a control terminal both coupled to said third node, and a second current handling terminal coupled to said first node. 14. The circuit of claim 11, wherein said differential amplifier comprises: said second transistor having a first current handling terminal coupled to a third node, a second current handling terminal coupled to a fourth node, and a control terminal coupled to an intermediate node between said first and second resistors; said third transistor having a first current handling terminal coupled to a fifth node, a second current handling terminal coupled to said fourth node, and a control terminal coupled to said second node; a resistor coupled between said fourth node and said first supply voltage; a fourth transistor having a first current handling terminal coupled to said fifth node, a second current handling terminal coupled to said first node, and a control terminal coupled to said third node; and a fifth transistor having a first current handling terminal and a control terminal both coupled to said third node, and a second current handling terminal coupled to said first node. 15. The circuit of claim 11, further comprising: a fourth transistor having a first current handling terminal coupled to said first node, a second current handling terminal coupled to a sixth node, and a control terminal coupled to an output terminal of said differential amplifier; and a fifth transistor having a first current handling terminal coupled to said sixth node, a second current handling terminal coupled to said first supply voltage, and a control terminal coupled to said control terminal of said first transistor. 16. The circuit of claim 11, further comprising: a fourth transistor hav
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