IPC분류정보
국가/구분 |
United States(US) Patent
등록
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국제특허분류(IPC7판) |
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출원번호 |
US-0846524
(2001-04-30)
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발명자
/ 주소 |
- McClure, David C.
- Yin, Rong
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출원인 / 주소 |
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대리인 / 주소 |
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인용정보 |
피인용 횟수 :
13 인용 특허 :
8 |
초록
▼
A circuit and method are disclosed for monitoring the voltage level of an unregulated power supply. The circuit includes a voltage reference circuit for generating a first reference voltage signal and a trim circuit which generates a trimmed reference voltage signal based upon the first reference vo
A circuit and method are disclosed for monitoring the voltage level of an unregulated power supply. The circuit includes a voltage reference circuit for generating a first reference voltage signal and a trim circuit which generates a trimmed reference voltage signal based upon the first reference voltage signal. A comparator compares the unregulated power supply voltage to the trimmed reference voltage signal and asserts an output signal based upon the comparison. The output signal is fed back as an input to the trim circuit so that the trim circuit provides a hysteresis effect.
대표청구항
▼
1. A supply voltage level detection circuit, comprising: a voltage reference circuit for generating a first reference voltage signal; a voltage follower circuit, coupled to the voltage reference circuit, for receiving the first reference voltage signal and generating a second reference voltage
1. A supply voltage level detection circuit, comprising: a voltage reference circuit for generating a first reference voltage signal; a voltage follower circuit, coupled to the voltage reference circuit, for receiving the first reference voltage signal and generating a second reference voltage signal based upon the first reference voltage signal; and a compare circuit, coupled to the voltage follower circuit, for comparing a signal representative of a supply voltage level to the second reference voltage signal, and generating an alarm signal having a value based upon the comparison, a voltage difference between the first and second reference voltage signals being based upon the state of the alarm signal; wherein the voltage follower circuit comprises: a string of series-connected resistive elements;at least one multiplexing circuit having inputs connected to at least two locations along the string of resistive elements and an output coupled to the second reference voltage signal; andcontrol logic having an input coupled to the alarm signal and an output coupled to a control input of the multiplexer circuit.2. The supply voltage level detection circuit of claim 1, wherein: the second reference voltage signal is at first voltage level when the alarm signal indicates that the signal representative of the supply voltage level is greater than the second reference voltage signal, and a second voltage level when the alarm signal indicates that the signal representative of the supply voltage level is less than the second reference voltage signal, the first voltage level being less than the second voltage level. 3. The supply voltage level detection circuit of claim 1, wherein the voltage follower circuit further comprises: a differential amplifier having a first input coupled to the first reference voltage signal. an output coupled to a first node of the string of series-connected resistive elements, and a second input of the differential amplifier coupled to a second node in the string of series-connected resistive elements. 4. The supply voltage level detection circuit of claim 1, wherein the voltage follower circuit further comprises: a plurality of multiplexing circuits, each multiplexing circuit having inputs connected to distinct locations along the string of resistive elements and an output coupled to the second reference voltage signal, wherein the control logic selectively enables only one of the multiplexing circuits. 5. The supply voltage level detection circuit of claim 4, wherein: a first of the plurality of multiplexing circuits receives as inputs signals between resistive elements of the string of resistors near the top thereof; and a second of the plurality of multiplexing circuits receives as inputs signals between resistive elements of the string of resistors near the bottom thereof. 6. The supply voltage level detection circuit of claim 4, wherein the control logic includes programmable/programmed circuit elements.7. The supply voltage level detection circuit of claim 1, wherein: the at least one multiplexing circuit comprises a plurality of multiplexing circuits, each multiplexing circut having inputs connected to a plurality of distinct nodes along the string of resistive elements and an output coupled to the second reference voltage signal. 8. The supply voltage level detection circuit of claim 7, wherein each of the plurality of multiplexing circuits includes a first control input coupled to the alarm signal and a second control input coupled to a configuration signal identifying whether the second reference voltage signal is to be greater than or less than the first reference voltage signal.9. A supply voltage level detection circuit, comprising: a voltage reference circuit for generating a first reference voltage signal; a voltage follower circuit, coupled to the voltage reference circuit, for receiving the first reference voltage signal and generating a second reference voltage s ignal based upon the first reference voltage signal; and a compare circuit, coupled to the voltage follower circuit, for comparing a signal representative of a supply voltage level to the second reference voltage signal, and generating an alarm signal having a value based upon the comparison, a voltage difference between the first and second reference voltage signals being based upon the state of the alarm signal; the voltage follower circuit comprises: a string of series-connected resistive elements; a first transistor connected in parallel with at least one resistive element; and control logic having an output coupled to a control terminal of the transistor and an input coupled to the alarm signal; the voltage follower circuit is configured so as to set the second reference voltage signal to any of one or more voltage levels greater than the first reference voltage signal and one or more voltage levels less than the first reference voltage signal; the control logic output is based upon the configuration of the voltage follower circuit. 10. The supply voltage level detection circuit of claim 9, wherein: the first transistor is connected in parallel with a plurality of series-connected resistive elements, at least one of the series-connected resistive elements to which the first transistor is connected in parallel with is programmably shorted. 11. The supply voltage level detection circuit of claim 9, wherein the control logic is selectively disabled so as to maintain the first transistor in one of an on state and an off state.12. The supply voltage level detection circuit of claim 9, wherein the voltage follower includes at least one multiplexer circuit coupled to the string of series-connected resistive elements having an output coupled to an output that generates the second reference voltage signal and a first control input coupled to the alarm signal.13. The supply voltage level detection circuit of claim 12, wherein the at least one multiplexer circuit includes a second input coupled to a configuration signal identifying whether the second reference voltage signal is to be greater than or less than the first reference voltage signal.14. A method of monitoring the voltage level of a supply voltage, comprising: generating a first reference voltage signal; receiving the first reference voltage signal and generating a second reference voltage signal based upon the first reference voltage signal, the second reference voltage signal being a trimmed signal; and comparing a supply signal representative of a supply voltage level to the second reference voltage signal, and generating an alarm signal having a value based upon the comparison, the second reference voltage signal being based upon the comparison and being selectively programmed to be less than the first reference voltage signal. 15. The method of claim 14, wherein the voltage difference between the first reference voltage signal and the second reference voltage signal is based upon the comparison.16. The method of claim 15, wherein: the voltage difference is a first voltage amount when the supply signal is greater than the second reference voltage signal and a second voltage amount when the supply signal is less than the second reference voltage signal, the first voltage amount being greater than the second voltage amount. 17. The method of claim 15, wherein: the voltage difference is a first voltage amount when the supply signal is greater than the second reference voltage signal and a second voltage amount when the supply signal is less than the second reference voltage signal, the first voltage amount being less than the second voltage amount. 18. The method of claim 15, wherein: a portion of the voltage difference is programmably set. 19. The method of claim 14, wherein: the second reference voltage signal is at a first voltage level when the supply signal is greater than the second reference voltage signal and a second voltage level when the supply signal is less than the second reference voltage signal, the first voltage level being less than the second voltage level. 20. The method of claim 14, wherein the step of generating the second reference voltage signal comprises selecting, based upon the alarm signal, from a plurality of voltage levels for the second reference voltage signal.21. An integrated circuit, comprising: a first circuit for receiving a reference signal representative of a reference voltage and generating a trimmed reference signal based upon the reference signal; and a comparator circuit, coupled to the first circuit, for comparing the trimmed reference signal to an unregulated supply signal and generating an output signal based upon the comparison; the first circuit including hysteresis circuitry for varying the voltage of the trimmed reference signal based upon the output signal; the first circuit comprises a voltage follower including a string of components, a voltage drop appearing across each component; the hysteresis circuitry includes control circuitry for receiving the output signal and selectively shorting the voltage across at least one component in the string based upon the output signal; the control circuitry comprises control logic having an input coupled to the output signal and a transistor connected in parallel across the at least one component and having a control terminal driven by the control logic; the first circuit includes selection circuitry for selecting a polarity of the voltage difference between the reference signal and the trimmed reference signal and for selecting a node in the string of components for the trimmed reference signal based upon the output signal. 22. The integrated circuit of claim 21, wherien the hysteresis circuitry includes control circuitry for receiving the output signal and selectively shorting the voltage across at least one component in the string based upon the output signal.23. The integrated circuit of claim 22, wherein the control circuitry comprises control logic having an input coupled to the output signal and a transistor connected in parallel across the at least one component and having a control terminal driven by the control logic.24. The integrated circuit of claim 23, wherein the control circuitry includes first and second logic paths coupled between the output signal and the control terminal of the transistor, the first and second logic paths being selected based upon the selection circuitry.25. An integrated circuit, comprising: a first circuit for receiving a reference signal representative of a reference voltage and generating a trimmed reference signal based upon the reference signal; and a comparator circuit, coupled to the first circuit, for comparing the trimmed reference signal to an unregulated supply signal and generating an output signal based upon the comparison; the first circuit including hysteresis circuitry for varying the voltage of the trimmed reference signal based upon the output signal; the first circuit comprises a voltage follower including a string of components, a voltage drop appearing across each component; the hysteresis circuitry includes control circuitry for selectively coupling to the trimmed reference signal any of a plurality of tap points along the string of components based upon the state of the output signal; wherein the control circuitry comprises a first multiplexer circuit having as inputs at least two locations along the string of components, and control logic having an input coupled to the output signal and an output driving a selection input of the first multiplexer circuit. 26. The integrated circuit of claim 25, wherein: the first circuit includes selection circuitry for selecting a polarity of the voltage difference between the reference signal and the trimmed reference signal; and the control logic includes first and second logic paths between the output signal and the selection input of the first multiplexer circuit, the first and second logic paths being selected based upon the selection circuitry. 27. The integrated circuit of claim 26, wherein the control circuitry further comprises: a second multiplexer circuit having as inputs at least two locations along the string of components, distinct from the two locations associated with the first multiplexer circuit, the control logic driving a selection input of the second multiplexer circuit, one of the first and second multiplexer circuits being enabled by the selection circuitry. 28. A supply voltage level detection circuit, comprising: a voltage follower circuit for receiving a first reference voltage signal and generating a second reference voltage signal based upon the first reference voltage signal; and a compare circuit, coupled to the voltage follower circuit, for comparing a signal representative of a supply voltage level to the second reference voltage signal, and generating an alarm signal having a value based upon the comparison, the second reference voltage signal being based upon the comparison and being selectively programmed to be greater than and selectively programmed to be less than the first reference voltage signal; wherein the voltage follower circuit comprises: a string of series-connected resistive elements;at least one multiplexing circuit having inputs connected to at least two locations along the string of resistive elements and an output coupled to the second reference voltage signal; andcontrol logic having an input coupled to the alarm signal and an output coupled to a control input of the multiplexer circuit.29. The supply voltage level detection circuit of claim 28, wherein: the second reference voltage signal is at first voltage level when the alarm signal indicates that the signal representative of the supply voltage level is greater than the second reference voltage signal, and a second voltage level when the alarm signal indicates that the signal representative of the supply voltage level is less than the second reference voltage signal, the first voltage level being less than the second voltage level. 30. The supply voltage level detection circuit of claim 28, wherein the voltage follower circuit comprises: an amplifier circuit; a string of series-connected resistive elements coupled in a feed back path of the amplifier circuit; a first transistor connected in parallel with at least one resistive element; and control logic having an output coupled to a control terminal of the transistor and an input coupled to the alarm signal. 31. An integrated circuit, comprising: a first circuit for receiving a reference signal representative of a reference voltage and generating a trimmed reference signal based upon the supply signal; and a comparator circuit, coupled to the first circuit, for comparing the trimmed reference signal to an unregulated supply signal and generating an output signal based upon the comparison; the first circuit including hysteresis circuitry for varying the voltage of the trimmed reference signal based upon the output signal, the trimmed reference signal being greater than or less than the reference signal based upon the comparison. 32. The integrated circuit of claim 31, wherein: the hysteresis circuitry includes control circuitry for receiving the output signal and selectively shorting the voltage across at least one resistive element in the string based upon the output signal. 33. The integrated circuit of claim 31, wherein: the hysteresis circuitry includes control circuitry for selectively coupling to the trimmed reference signal any of a plurality of nodes in the string of resistive elements based upon the state of the output signal.
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