IPC분류정보
국가/구분 |
United States(US) Patent
등록
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국제특허분류(IPC7판) |
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출원번호 |
US-0184590
(2002-06-27)
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발명자
/ 주소 |
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출원인 / 주소 |
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대리인 / 주소 |
Schwegman, Lundberg, Woessner & Kluth, P.A.
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인용정보 |
피인용 횟수 :
4 인용 특허 :
78 |
초록
▼
Techniques of shallow trench isolation and devices produced therefrom. The techniques of shallow trench isolation utilize foamed polymers, cured aerogels or air gaps as the insulation medium. Such techniques facilitate lower dielectric constants than the standard silicon dioxide due to the cells of
Techniques of shallow trench isolation and devices produced therefrom. The techniques of shallow trench isolation utilize foamed polymers, cured aerogels or air gaps as the insulation medium. Such techniques facilitate lower dielectric constants than the standard silicon dioxide due to the cells of gaseous components inherent in foamed polymers, cured aerogels or air gaps. Lower dielectric constants reduce capacitive coupling concerns and thus permit higher device density in an integrated circuit device.
대표청구항
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1. An electronic system, comprising:a processor; anda circuit module having a plurality of leads coupled to the processor, and further having a semiconductor die coupled to the plurality of leads, wherein the semiconductor die includes:an integrated circuit supported by a substrate and having a plur
1. An electronic system, comprising:a processor; anda circuit module having a plurality of leads coupled to the processor, and further having a semiconductor die coupled to the plurality of leads, wherein the semiconductor die includes:an integrated circuit supported by a substrate and having a plurality of semiconductor devices, wherein at least two of the plurality of semiconductor devices are isolated by an interposing trench, wherein the trench contains cells of gaseous components; anda metal interconnect structure located over a portion of the cells of gasseous components and electrically in communication with a selected number of the plurality of semiconductor devices. 2. The electronic system of claim 1, wherein the trench contains a fill material selected from the group consisting of a foamed polymeric material, a cured aerogel and an air gap. 3. The electronic system of claim 2, wherein the foamed polymeric material includes a polymeric material selected from the group consisting of methylsilsesquioxane, polyimides and polynorbornenes. 4. The electronic system of claim 2, wherein the foamed polymeric material includes a polymeric material selected from the group consisting of Type I and Type III polyimides. 5. An electronic system, comprising:a processor; anda circuit module having a plurality of leads coupled to the processor, and further having a semiconductor die coupled to the plurality of leads, wherein the semiconductor die includes:an integrated circuit supported by a substrate and having a plurality of semiconductor devices, wherein at least two of the plurality of semiconductor devices are isolated by an interposing trench, wherein the trench is filled with a foamed polymeric material; anda metal interconnect structure located over a portion of the foamed polymeric material and electrically in communication with a selected number of the plurality of semiconductor devices. 6. The electronic system of claim 5, wherein the layer of material includes a metal interconnect structure electrically in communication with a selected number of the plurality of semiconductor devices. 7. The electronic system of claim 6, wherein the metal interconnect structure includes a refractory metal. 8. The electronic system of claim 6, wherein the metal interconnect structure includes tungsten. 9. An electronic system, comprising:a processor; anda circuit module having a plurality of leads coupled to the processor, and further having a semiconductor die coupled to the plurality of leads, wherein the semiconductor die includes:an integrated circuit supported by a substrate and having a plurality of semiconductor devices, wherein at least two of the plurality of semiconductor devices are isolated by an interposing trench, wherein the trench is filled with a cured aerogel; anda metal interconnect structure located over a portion of the cured aerogel and electrically in communication with a selected number of the plurality of semiconductor devices. 10. The electronic system of claim 9, wherein the cured aerogel includes a silica aerogel. 11. The electronic system of claim 9, wherein the cured aerogel includes a methylsilsesquioxane (MSSQ) material. 12. An electronic system, comprising:a processor; anda circuit module having a plurality of leads coupled to the processor, and further having a semiconductor die coupled to the plurality of leads, wherein the semiconductor die includes:an integrated circuit supported by a substrate and having a plurality of semiconductor devices, wherein at least two of the plurality of semiconductor devices are isolated by an interposing trench, and wherein the trench is filled with an air gap; anda conducting layer located over a portion of the air gap, wherein the conducting layer forms a direct interface with the air gap. 13. The electronic system of claim 12, wherein the conducting layer includes a metal interconnect structure electrically in communication with a selected number of the plurality of sem iconductor devices. 14. The electronic system of claim 13, wherein the metal interconnect structure includes a refractory metal. 15. The electronic system of claim 13, wherein the metal interconnect structure includes tungsten. 16. An electronic system, comprising:a processor; anda circuit module having a plurality of leads coupled to the processor, and further having a semiconductor die coupled to the plurality of leads, wherein the semiconductor die includes:an integrated circuit supported by a substrate and having a plurality of semiconductor devices, wherein at least two of the plurality of semiconductor devices are isolated by an interposing trench, wherein the trench is filled with a foamed polyimide material; anda metal interconnect structure located over a portion of the foamed polyimide material and electrically in communication with a selected number of the plurality of semiconductor devices. 17. The electronic system of claim 16, wherein the foamed polyimide material includes a polymeric material selected from the group consisting of Type I and Type III polyimides. 18. The electronic system of claim 16, wherein the a foamed polyimide material includes an elastic modulus of less than about 1.4 GPa and a coefficient of thermal expansion of about 20 μm/m° C. 19. The electronic system of claim 16, wherein the a foamed polyimide material includes an elastic modulus of less than about 2.4 GPa and a coefficient of thermal expansion of about 40 μm/m° C. 20. An electronic system, comprising:a processor;a circuit module having a plurality of leads coupled to the processor, and further having semiconductor die coupled to the plurality of leads, wherein the semiconductor die includes:an integrated circuit supported by a substrate and having a plurality of semiconductor devices, wherein at least two of the plurality of semiconductor devices are isolated by an interposing trench, and wherein the trench contains cells of gaseous components capable of withstanding a first processing temperature or less; anda metal interconnect structure located over a portion of the foamed polyimide material and electrically in communication with a selected number of the plurality of semiconductor devices, wherein the metal interconnect structure is deposited at a second processing temperature higher than the first processing temperature. 21. The electronic system of claim 20, wherein the metal interconnect structure includes a refractory metal. 22. The electronic system of claim 20, wherein the metal interconnect structure includes tungsten. 23. An electronic system, comprising:a processor; anda circuit module having a plurality of leads coupled to the processor, and further having a semiconductor die coupled to the plurality of leads, wherein the semiconductor die includes:an integrated circuit supported by a substrate and having a plurality of semiconductor devices, wherein at least two of the plurality of semiconductor devices are isolated by an interposing trench, and wherein the trench is filled with a foamed polynorbornene material; anda metal interconnect structure located over a portion of the foamed polynorbornene material and electrically in communication with a selected number of the plurality of semiconductor devices. 24. An electronic system, comprising:a processor; anda circuit module having a plurality of leads coupled to the processor, and further having a semiconductor die coupled to the plurality of leads, wherein the semiconductor die includes:an integrated circuit supported by a substrate and having a plurality of semiconductor devices, wherein at least two of the plurality of semiconductor devices are isolated by an interposing trench, wherein the trench is filled with a foamed methylsilsesquioxane material; anda metal interconnect structure located over a portion of the foamed methylsilsesquioxane material and electrically in communication with a selected number of the plurality of semiconductor devices.
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