IPC분류정보
국가/구분 |
United States(US) Patent
등록
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국제특허분류(IPC7판) |
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출원번호 |
US-0122870
(2002-04-15)
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발명자
/ 주소 |
- Ahn, Kie Y.
- Forbes, Leonard
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출원인 / 주소 |
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대리인 / 주소 |
Whyte Hirschboeck Dudek SC
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인용정보 |
피인용 횟수 :
10 인용 특허 :
26 |
초록
▼
A method for forming conductive contacts and interconnects in a semiconductor structure, and the resulting conductive components are provided. In particular, the method is used to fabricate single or dual damascene copper contacts and interconnects in integrated circuits such as memory devices and m
A method for forming conductive contacts and interconnects in a semiconductor structure, and the resulting conductive components are provided. In particular, the method is used to fabricate single or dual damascene copper contacts and interconnects in integrated circuits such as memory devices and microprocessor.
대표청구항
▼
1. A semiconductor circuit, comprising:a semiconductor structure;an insulating layer over the semiconductor structure, the insulating layer having a contact opening extending therethrough to the semiconductor structure, wherein the contact opening has a surface and an aspect ratio of about 3:1 or gr
1. A semiconductor circuit, comprising:a semiconductor structure;an insulating layer over the semiconductor structure, the insulating layer having a contact opening extending therethrough to the semiconductor structure, wherein the contact opening has a surface and an aspect ratio of about 3:1 or greater wherein a diameter of the opening is about 0.25 μm or less;a non-metal barrier layer comprising silicon oxynitride over the insulating layer including the surface of the contact opening; whereby the barrier layer prevents diffusion of a copper-comprising material into the insulating layer; anda substantially void-less conductive contact within the contact opening over the barrier layer, and coupled to the semiconductor structure; the conductive contact comprising copper sputtered into the contact opening and reflowed at a temperature less than about 400° C. in the presence of atomic hydrogen. 2. The semiconductor circuit of claim 1, wherein the insulating layer comprises silicon oxyfluoride. 3. The semiconductor circuit of claim 1, wherein the barrier layer is about 5 nm to about 10 nm thick. 4. The semiconductor circuit of claim 1, wherein the copper comprises an ionized magnetron sputtered copper. 5. The semiconductor circuit of claim 1, wherein the atomic hydrogen is derived from a microwave-excited high density krypton/hydrogen plasma. 6. The semiconductor circuit of claim 1, further comprising: a conductive interconnect within a trench opening in the insulating layer over the barrier layer, and coupled to the conductive contact. 7. The semiconductor circuit of claim 6, wherein the conductive interconnect comprises copper sputtered into the trench opening and reflowed at a temperature less than about 400° C. in the presence of atomic hydrogen. 8. The semiconductor circuit of claim 6, wherein the conductive contact and the conductive interconnect are a dual damascene structure. 9. The circuit of claim 1, wherein the non-metal barrier layer comprises a nitrided surface of the insulating layer. 10. A semiconductor circuit, comprising:a semiconductor structure;an insulating layer over the semiconductor structure; the insulating having a plurality of generally vertical contact openings extending therethrough to contact locations on the semiconductor structure, and a plurality of generally horizontal trench openings extending over the insulating layer; each of the contact openings and trench openings having a surface and a non-metal barrier layer comprising silicon oxynitride hereon; one or more of the contact openings having an aspect ratio of about 3:1 or greater wherein a diameter of the opening is about 0.25 μm or less;a plurality of generally vertical and substantially void-less conductive contacts within the contact openings and coupled to the semiconductor structure, the conductive contacts comprising copper deposited by ionized sputtering into the contact opening over the barrier layer and reflowed at a temperature less than about 400° C. in the presence of atomic hydrogen to fill the contact opening; anda plurality of generally horizontal conductive interconnect lines within the trench openings, each of the interconnect lines coupled to at least one generally vertical conductive contact. 11. The semiconductor circuit of claim 10, wherein the conductive contacts and the conductive interconnects are a dual damascene structure. 12. The semiconductor circuit of claim 10, wherein the insulating layer comprises silicon oxyfluoride, and the barrier layer comprises an about 5 to about 10 nm thick layer of silicon oxynitride. 13. The semiconductor circuit of claim 10, wherein the atomic hydrogen is derived from a krypton/hydrogen plasma. 14. A semiconductor circuit, comprising:a semiconductor structure;an insulating layer over the semiconductor structure; the insulating having a plurality of generally vertical contact openings extending therethrough to contact locations on the semiconductor structure, and a plurality of generally horizontal trench openings extending over the insulating layer; each of the contact openings and trench openings having a surface and a non-metal barrier layer comprising silicon oxynitride thereon; one or more of the trench openings having an aspect ratio of about 3:1 or greater wherein a diameter of the opening is about 0.25 μm or less;a plurality of generally vertical conductive contacts within the contact openings and coupled to the semiconductor structure; anda plurality of generally horizontal and substantially void-less conductive interconnect lines within the trench openings, each of the interconnect lines coupled to at least one generally vertical conductive contact, the interconnect lines comprising copper deposited by ionized sputtering into the trench opening over the barrier layer and reflowed at a temperature less than about 400° C. in the presence of atomic hydrogen to fill the trench opening. 15. The semiconductor circuit of claim 14, wherein the atomic hydrogen is derived from a krypton/hydrogen plasma. 16. The semiconductor circuit of claim 14, wherein the conductive contacts and the conductive interconnects are a dual damascene structure. 17. A semiconductor circuit, comprising:a semiconductor structure;an insulating layer over the semiconductor structure; the insulating layer having a plurality of generally vertical contact openings extending therethrough to contact locations on the semiconductor structure, and a plurality of generally horizontal trench openings extending over the insulating layer; each of the contact openings and trench openings having a surface and a non-metal barrier layer comprising silicon oxynitride thereon; one or more of the contact openings, trench openings, or both, having an aspect ratio of about 3:1 or greater wherein a diameter of the opening is about 0.25 μm or less;a plurality of generally vertical and substantially void-less conductive contacts within the contact openings and coupled to the semiconductor structure; anda plurality of generally horizontal and substantially void-less conductive interconnect lines within the trench openings, each of the interconnect lines coupled to at least one generally vertical conductive contact;the conductive contacts and the interconnect lines comprising copper deposited by ionized sputtering into the trench opening over the barrier layer and reflowed at a temperature less than about 400° C. in the presence of atomic hydrogen to fill the contact opening and the trench opening. 18. The semiconductor circuit of claim 17, wherein the atomic hydrogen is derived from a krypton/hydrogen plasma. 19. The semiconductor circuit of claim 17, wherein the conductive contacts and the conductive interconnects are a dual damascene structure. 20. An integrated circuit memory device, comprising:an array of memory cells;internal circuitry; andmetal contacts and interconnects coupled to the memory array and internal circuitry, the metal contacts and interconnects comprising:a plurality of generally vertical and substantially void-less conductive contacts disposed within a contact opening extending through an insulating layer overlying the memory array, at least one of the contact openings having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less, each conductive contact comprising copper deposited by ionized sputtering into the contact opening over a non-metal barrier layer on a surface of a the contact opening and reflowed at a temperature less than about 400° C. in the presence of atomic hydrogen to fill the contact opening, the barrier layer comprising silicon oxynitride; anda plurality of generally horizontal conductive interconnect lines extending over the insulating layer, each of the interconnect lines coupled to at least one generally vertical conductive contact. 21. The integrated circuit memory device of claim 20, wherein the atomic hydrogen is derived from a krypton/hydrogen plasma. 22. The integrated circuit memory device of claim 20, wherein the metal contacts and interconnects are a dual damascene structure. 23. An integrated circuit memory device, comprising:an array of memory cells;internal circuitry; andmetal contacts and interconnects coupled to the memory array and internal circuitry, the metal contacts and interconnects comprising a plurality of generally horizontal conductive interconnect lines extending over the insulating layer overlying the memory array, each of the interconnect lines coupled to at least one generally vertical conductive contact; each conductive interconnect being substantially void-less and comprising copper deposited by ionized sputtering over a non-metal barrier layer on a surface of a trench opening extending over the insulating layer, and reflowed at a temperature less than about 400° C. in the presence of atomic hydrogen to fill the trench opening; the barrier layer comprising silicon oxynitride; and at least one of the trench openings having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less. 24. The integrated circuit memory device of claim 17, wherein the atomic hydrogen is derived from a krypton/hydrogen plasma. 25. The integrated circuit memory device of claim 23, wherein the metal contacts and interconnects are a dual damascene structure. 26. An integrated circuit memory device, comprising:an array of memory cells;internal circuitry; andsubstantially void-less conductive contacts and interconnects coupled to the memory cell array and internal circuitry, the conductive interconnect lines extending generally horizontally within a trench opening within an insulating layer overlying the memory cell array, each of the interconnect lines coupled to at least one conductive contact extending generally vertically within a contact opening extending through the insulating layer to the memory cell array;each conductive contact and interconnect comprising copper deposited by ionized sputtering over a non-metal barrier layer on an exposed surface of the contact opening and the trench opening, and reflowed in the presence of atomic hydrogen to fill the trench opening and the contact opening; the barrier layer comprising silicon oxynitride; and at least one of said contact openings or trench openings having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less. 27. The integrated circuit memory device of claim 26, wherein the atomic hydrogen is derived from a krypton/hydrogen plasma. 28. The integrated circuit memory device of claim 26, wherein the metal contacts and interconnects are a dual damascene structure. 29. A conductive contact in a semiconductor device, comprising: a substantially void-less sputter deposited copper contact disposed over a non-metal barrier layer lining an opening in an insulative layer disposed on a substrate, the barrier layer comprising silicon oxynitride; and the opening having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less; the deposited copper being reflowed at a temperature of less than about 400° C.; whereby the barrier layer prevents diffusion of the copper into the insulative layer. 30. A conductive contact in a semiconductor device, comprising: a substantially void-less sputter deposited copper disposed over a non-metal barrier layer lining an opening in an insulative layer disposed on a substrate, the opening having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less; the barrier layer comprising silicon oxynitride; and the deposited copper being reflowed at a temperature of about 400° C. to about 350° C.; whereby the barrier layer prevents diffusion of the copper into the insulative layer. 31. A conductive contact of a semiconductor device, the conductive contact disposed within an opening in an insulative layer having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less, and comprising a substantially void-less sputter deposited and reflowed copper overlying a non-metal barrier layer lining the opening, the barrier layer comprising silicon oxynitride; and the deposited copper being reflowed at a temperature of less than about 400° C.; whereby the barrier layer prevents diffusion of the copper into the insulative layer. 32. The conductive contact of claim 31, wherein the insulative layer comprises a low k dielectric material. 33. A conductive contact of a semiconductor device, the conductive contact disposed within an opening in an insulative layer having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less, and comprising a substantially void-less sputter deposited and reflowed copper overlying a nitrogen-comprising barrier layer lining the opening, the barrier layer comprising silicon oxynitride; and the deposited copper being reflowed at a temperature of less than about 400° C.; whereby the barrier layer prevents diffusion of the copper into the insulative layer. 34. A conductive contact of a semiconductor device, the conductive contact disposed within an opening in an insulative layer having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less, and comprising a substantially void-less sputter deposited and reflowed copper fill overlying a silicon oxynitride barrier layer lining the opening, the deposited copper being reflowed at a temperature of less than about 400° C.; whereby the barrier layer prevents diffusion of the copper into the insulative layer. 35. A conductive contact of a semiconductor device, the conductive contact disposed within an opening in an insulative layer having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less, and comprising a substantially void-less sputter deposited copper overlying a non-metal barrier layer lining the opening; the barrier layer comprising silicon oxynitride; and the copper deposited by ionized sputtering and reflowed at a temperature less than about 400° C. in the presence of atomic hydrogen; whereby the barrier layer prevents diffusion of the copper into the insulative layer. 36. A conductive contact of a semiconductor device, the conductive contact disposed within an opening in an insulative layer having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less, and comprising a substantially void-less sputter deposited copper overlying a nitrogen-comprising barrier layer over the insulative layer within the opening; the barrier layer comprising silicon oxynitride; and the copper deposited by ionized sputtering and reflowed at a temperature less than about 400° C. in the presence of atomic hydrogen; whereby the barrier layer prevents diffusion of the copper into the insulative layer. 37. A conductive contact of a semiconductor device, the conductive contact disposed within an opening in an insulative layer having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less, and comprising a substantially void-less reflowed, ionized magnetron sputtered copper overlying a non-metal barrier layer lining the opening; the barrier layer comprising silicon oxynitride; and the copper reflowed at a temperature less than about 400° C. in the presence of atomic hydrogen; whereby the barrier layer prevents diffusion of the copper into the insulative layer. 38. A conductive contact of a semiconductor device, the conductive contact disposed within an opening in a silicon oxyfluoride insulative layer having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less, and comprising a substantially void-less reflowed, sputtered copper overlying a silicon oxynitride barrier layer over the silicon oxyfluoride insulative layer lining the opening, the deposited copper being reflowed at a temperature of less than about 400° C.; whereby the barrier layer prevents diffusion of the copper into the insulative layer. 39. A conductive contact of a semiconductor device, the conductive contact disposed within an opening in a silicon oxyfluoride insulative layer having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less, and comprising a substantially void-less reflowed, ionized magnetron sputtered copper overlying a silicon oxynitride barrier layer over the silicon oxyfluoride insulative layer lining the opening; the deposited copper being reflowed at a temperature of less than about 400° C.; whereby the barrier layer prevents diffusion of the copper into the insulative layer. 40. A conductive contact of a semiconductor device, the conductive contact disposed within an opening in a silicon oxyfluoride layer having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less, and comprising a substantially void-less reflowed, ionized magnetron sputtered copper overlying a silicon oxynitride barrier layer disposed over the silicon oxyfluoride insulative layer within the opening; the copper reflowed at a temperature less than about 400° C. in the presence of atomic hydrogen; whereby the barrier layer prevents diffusion of the copper into the insulative layer. 41. A conductive contact of a semiconductor device, the conductive contact disposed within an opening in a silicon oxyfluoride insulative layer having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less, and comprising a substantially void-less copper fill overlying a silicon oxynitride barrier layer over the silicon oxyfluoride insulative layer within the opening; the copper fill comprising ionized magnetron sputtered copper reflowed at a temperature less than about 400° C. in the presence of atomic hydrogen; whereby the barrier layer prevents diffusion of the copper into the insulative layer. 42. A semiconductor device, comprising:a conductive contact comprising a substantially void-less sputter deposited and reflowed copper fill disposed over a non-metal barrier layer lining an opening in an insulative layer disposed on a substrate, the barrier layer comprising silicon oxynitride; and the opening having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less, the copper being reflowed at a temperature of less than about 400° C.; whereby the barrier layer prevents diffusion of a copper material into the insulating layer. 43. The semiconductor device of claim 42, wherein the insulative layer comprises a low k dielectric material. 44. The semiconductor device of claim 42, wherein the copper is an ionized sputtered copper. 45. A semiconductor device, comprising:a conductive contact comprising a substantially void-less sputter deposited and reflowed copper fill overlying a nitrogen-comprising barrier layer lining an opening in an insulative layer on a substrate; the barrier layer having a thickness of up to 10 nm and comprising silicon oxynitride; and the opening having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less, the copper being reflowed at a temperature less than about 400° C.; whereby the barrier layer prevents diffusion of the copper into the insulative layer. 46. A semiconductor device, comprising:a conductive contact comprising a substantially void-less sputter deposited and reflowed copper fill overlying a silicon oxynitride barrier layer lining an opening in an insulative layer on a substrate, the opening having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less, the copper being reflowed at a temperature of less than about 400° C.; whereby the barrier layer prevents diffusion of the copper into the insulative layer. 47. A semiconductor device, comprising:a conductive contact comprising a substantially void-less sputter deposited copper fill disposed ov er a non-metal barrier layer lining an opening in an insulative layer on a substrate, the barrier layer comprising silicon oxynitride; and the opening having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less, the copper deposited by ionized sputtering and reflowed at a temperature less than about 400° C. in the presence of atomic hydrogen; whereby the barrier layer prevents diffusion of the copper into the insulative layer. 48. A semiconductor device, comprising:a conductive contact comprising a substantially void-less sputter deposited copper fill disposed over a nitrogen-comprising barrier layer lining an opening in an insulative layer on a substrate, the barrier layer comprising silicon oxynitride; and the opening having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less; the copper deposited by ionized sputtering and reflowed at a temperature less than about 400° C. in the presence of atomic hydrogen; whereby the barrier layer prevents diffusion of the copper into the insulative layer. 49. A semiconductor device, comprising:a conductive contact comprising a substantially void-less sputter deposited copper fill disposed over a nitrogen-comprising barrier layer lining an opening in an insulative layer on a substrate, the barrier layer comprising silicon oxynitride; and the opening having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less; the copper deposited by ionized sputtering and reflowed at a temperature less than about 400° C. in the presence of atomic hydrogen from a high density plasma source of krypton/hydrogen; whereby the barrier layer prevents diffusion of the copper into the insulative layer. 50. A semiconductor device, comprising:a conductive contact disposed within an opening in an insulative layer having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less, the conductive contact comprising a substantially void-less reflowed, ionized magnetron sputtered copper fill overlying a non-metal barrier layer lining the opening; the copper reflowed at a temperature less than about 400° C. in the presence of atomic hydrogen; whereby the barrier layer comprises silicon oxynitride, and prevents diffusion of the copper into the insulative layer. 51. A semiconductor device, comprising:a conductive contact disposed within an opening in an insulative layer having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less, the contact comprising a substantially void-less copper fill disposed over a nitrogen-comprising barrier layer over the insulative layer within the opening; the barrier layer comprising silicon oxynitride; and the copper fill comprising ionized magnetron sputtered copper reflowed at a temperature less than about 400° C. in the presence of atomic hydrogen; whereby the barrier layer prevents diffusion of the copper into the insulative layer. 52. A semiconductor device, comprising:a conductive contact disposed within an opening in an insulative layer having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less, and comprising a substantially void-less copper fill disposed over a nitrogen-comprising barrier layer over the insulative layer within the opening; the barrier layer comprising silicon oxynitride; and the copper fill comprising ionized magnetron sputtered copper reflowed at a temperature less than about 400° C. in the presence of atomic hydrogen from a high density plasma source of krypton/hydrogen; whereby the barrier layer prevents diffusion of the copper into the insulative layer. 53. A semiconductor device, comprising:a conductive contact disposed within an opening in an insulative layer having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less, and comprising a substantially void-less copper fill disposed over a nitrogen-comprising barrie r layer over the insulative layer within the opening; the barrier layer comprising silicon oxynitride; and the copper fill comprising ionized magnetron sputtered copper reflowed in atomic hydrogen derived from a microwave excited high density plasma source of krypton/hydrogen at a temperature of less than about 400° C.; whereby the barrier layer prevents diffusion of the copper into the insulating layer. 54. A semiconductor circuit, comprising:a substrate comprising a semiconductor structure disposed thereon, an insulative layer overlying the semiconductor structure and having an opening therethrough to the semiconductor structure, the opening having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less; a conductive contact disposed within the opening and comprising a substantially void-less sputter deposited and reflowed copper fill overlying a non-metal barrier layer on the insulative layer within the opening, the barrier layer comprising silicon oxynitride; and the copper fill being reflowed at a temperature less than about 400° C.; whereby the barrier layer prevents diffusion of the copper into the insulative layer. 55. A semiconductor circuit, comprising:a substrate comprising a semiconductor structure disposed thereon, an insulative layer overlying the semiconductor structure and having an opening therethrough to the semiconductor structure, the opening having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less; a conductive contact disposed within the opening and comprising a substantially void-less sputter deposited and reflowed copper fill overlying a non-metal barrier layer on the insulative layer within the opening, the barrier layer comprising silicon oxynitride; and the copper fill being reflowed at a temperature of about 300° C. to about 350° C.; whereby the barrier layer prevents diffusion of the copper into the insulative layer. 56. A semiconductor circuit, comprising:a substrate comprising a semiconductor structure disposed thereon, an insulative layer overlying the semiconductor structure and having an opening therethrough to the semiconductor structure, the opening having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less; a conductive contact disposed within the opening and comprising a substantially void-less sputter deposited and reflowed copper fill overlying a nitrogen-comprising barrier layer on the insulative layer within the opening, the barrier layer comprising silicon oxynitride; and the copper fill being reflowed at a temperature of less than about 400° C.; whereby the barrier layer prevents diffusion of the copper into the insulative layer. 57. A semiconductor circuit, comprising:a substrate comprising a semiconductor structure disposed thereon, an insulative layer overlying the semiconductor structure and having an opening therethrough to the semiconductor structure, the opening having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less; a conductive contact disposed within the opening and comprising a substantially void-less sputter deposited copper fill overlying a non-metal barrier layer on the insulative layer within the opening; the barrier layer comprising silicon oxynitride; and the copper deposited by ionized sputtering and reflowed at a temperature less than about 400° C. in the presence of atomic hydrogen; whereby the barrier layer prevents diffusion of the copper into the insulative layer. 58. A semiconductor circuit, comprising:a substrate comprising a semiconductor structure disposed thereon, an insulative layer overlying the semiconductor structure and having an opening therethrough to the semiconductor structure, the opening having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less; a conductive contact disposed within the opening and comprising a substantially void-less sputter depo sited copper fill overlying a non-metal barrier layer on the insulative layer within the opening; the barrier layer comprising silicon oxynitride; and the copper deposited by ionized sputtering and reflowed at a temperature less than about 400° C. in the presence of atomic hydrogen from a high density plasma source of krypton/hydrogen; whereby the barrier layer prevents diffusion of the copper into the insulative layer. 59. A semiconductor circuit, comprising:a substrate comprising a semiconductor structure disposed thereon, an insulative layer overlying the semiconductor structure and having an opening therethrough to the semiconductor structure, the opening having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less; a conductive contact disposed within the opening, and comprising a substantially void-less ionized magnetron sputtered copper fill overlying a non-metal barrier layer on the insulative layer within the opening; the barrier layer comprising silicon oxynitride; and the copper fill reflowed at a temperature less than about 400° C. in the presence of atomic hydrogen from a high density plasma source of krypton/hydrogen; whereby the barrier layer prevents diffusion of the copper into the insulative layer. 60. A semiconductor circuit, comprising:a substrate comprising one or more semiconductor structures disposed thereon, an insulative layer overlying the one or more semiconductor structures and having one or more openings therethrough to at least one of the one or more semiconductor structures, at least one of the openings having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less with a conductive contact disposed therein comprising a substantially void-less sputter deposited and reflowed copper fill overlying a non-metal barrier layer on the insulative layer within the opening, the barrier layer comprising silicon oxynitride; and the copper fill being reflowed at a temperature of less than about 400° C.; whereby the barrier layer prevents diffusion of the copper into the insulative layer. 61. A semiconductor circuit, comprising:a substrate comprising one or more semiconductor structures disposed thereon; an insulative layer overlying the one or more semiconductor structures, and having a plurality of openings therethrough to at least one of the one or more semiconductor structures and at least one trench extending from at least one opening over the insulative layer; at least one of the openings, the trench, or both, having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less;a substantially void-less sputtered and reflowed copper fill overlying a non-metal barrier layer on the insulative layer within the openings and the at least one trench, the barrier layer comprising silicon oxynitride; and the copper fill being reflowed at a temperature of less than about 400° C.; whereby the barrier layer prevents diffusion of the copper into the insulative layer. 62. A semiconductor circuit, comprising:a substrate comprising one or more semiconductor structures disposed thereon; an insulative layer overlying the one or more semiconductor structures, and having a plurality of openings therethrough to at least one of the one or more semiconductor structures and at least one trench extending from at least one opening over the insulative layer; at least one of the openings, the trench, or both, having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less;a substantially void-less sputtered and reflowed copper fill overlying a non-metal barrier layer on the insulative layer within the openings and the at least one trench, the barrier layer comprising silicon oxynitride; and the copper fill being reflowed at a temperature of less than about 400° C.; whereby the barrier layer prevents diffusion of the copper into the insulative layer. 63. A semiconductor circuit, comprising:a su bstrate comprising one or more semiconductor structures disposed thereon; an insulative layer overlying the one or more semiconductor structures, and having a plurality of openings therethrough to at least one of the one or more semiconductor structures and at least one trench, extending from at least one opening over the insulative layer; at least one of the openings, the trench, or both, having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less;a substantially void-less sputtered copper fill overlying a nitrogen-comprising barrier layer on the insulative layer within the openings and the at least one trench, the barrier layer comprising silicon oxynitride; and the copper fill being reflowed at a temperature of less than about 400° C.; whereby the barrier layer prevents diffusion of the copper into the insulative layer. 64. A semiconductor circuit, comprising:a substrate comprising one or more semiconductor structures disposed thereon; an insulative layer overlying the one or more semiconductor structures, and having a plurality of openings therethrough to at least one of the one or more semiconductor structures and at least one trench extending from at least one opening over the insulative layer; at least one of the openings, the trench, or both, having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less;a substantially void-less sputtered copper fill overlying a non-metal barrier layer on the insulative layer within the openings and the at least one trench; the barrier layer comprising silicon oxynitride; and the copper deposited by ionized sputtering and reflowed at a temperature less than about 400° C. in the presence of atomic hydrogen; whereby the barrier layer prevents diffusion of the copper into the insulative layer. 65. A semiconductor circuit, comprising:a substrate comprising one or more semiconductor structures disposed thereon; an insulative layer overlying the one or more semiconductor structures, and having a plurality of openings therethrough to at least one of the one or more semiconductor structures and at least one trench extending from at least one opening over the insulative layer, at least one of the openings, the trench, or both, having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less; and a substantially void-less conductive fill overlying a non-metal barrier layer on the insulative layer within the openings and the at least one trench; the barrier layer comprising silicon oxynitride; and the conductive fill comprising an ionized magnetron sputtered copper fill reflowed at a temperature less than about 400° C. in the presence of atomic hydrogen from a high density plasma source of krypton/hydrogen; whereby the barrier layer prevents diffusion of the copper into the insulative layer. 66. An integrated circuit memory device, comprising:an array of memory cells;internal circuitry; andsubstantially void-less conductive contacts and interconnects coupled to the memory array and internal circuitry, the conductive contacts and interconnects comprising sputter deposited and reflowed copper disposed over a non-metal barrier layer lining openings in an insulative layer disposed on a substrate, at least one of the openings having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less, the barrier layer comprising silicon oxynitride; and the copper being reflowed at a temperature of less than about 400° C.; whereby the barrier layer prevents diffusion of the copper into the insulative layer. 67. An integrated circuit memory device, comprising:an array of memory cells;internal circuitry; andsubstantially void-less conductive contacts and interconnects coupled to the memory array and internal circuitry, the conductive contacts and interconnects comprising sputter deposited and reflowed copper disposed over a nitrogen-comprising barrier layer lining openings in an insulative layer disposed on a substrate, at least one of the openings having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less, the barrier layer comprising silicon oxynitride, and the copper being reflowed at a temperature of less than about 400° C.; whereby the barrier layer prevents diffusion of the copper into the insulative layer. 68. An integrated circuit memory device, comprising:an array of memory cells;internal circuitry; andsubstantially void-less conductive contacts and interconnects coupled to the memory array and internal circuitry, the conductive contacts and interconnects comprising sputter deposited and reflowed copper disposed over a non-metal barrier layer lining openings in an insulative layer disposed on a substrate, at least one of the openings having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less, the barrier layer comprising silicon oxynitride, and the copper deposited by ionized sputtering and reflowed at a temperature less than about 400° C. in the presence of atomic hydrogen; whereby the barrier layer prevents diffusion of the copper into the insulative layer. 69. An integrated circuit memory device, comprising:an array of memory cells;internal circuitry; andsubstantially void-less conductive contacts and interconnects coupled to the memory array and internal circuitry, the conductive contacts and interconnects comprising sputter deposited and reflowed copper disposed over a non-metal barrier layer lining openings in an insulative layer disposed on a substrate, at least one of the openings having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less; the barrier layer comprising silicon oxynitride; and the copper deposited by ionized sputtering and reflowed at a temperature less than about 400° C. in the presence of atomic hydrogen from a high density plasma source of krypton/hydrogen; whereby the barrier layer prevents diffusion of the copper into the insulative layer. 70. An integrated circuit memory device, comprising:an array of memory cells;internal circuitry; andsubstantially void-less conductive contacts and interconnects coupled to the memory array and internal circuitry, the conductive contacts and interconnects comprising sputter deposited and reflowed copper disposed over a non-metal barrier layer lining openings in an insulative layer disposed on a substrate, at least one of the openings having an aspect ratio of about 3:1 or greater and a diameter of about 0.25 μm or less; the barrier layer comprising silicon oxynitride; and the copper deposited by ionized sputtering and reflowed at a temperature less than about 400° C. in the presence of atomic hydrogen; whereby the barrier layer prevents diffusion of the copper into the insulative layer. 71. A substantially void-less contact comprising sputtered and atomic hydrogen reflowed copper disposed over a non-metal barrier material layer lining an opening in an insulating layer having a diameter of about 0.25 μm or less and an aspect ratio of about 3:1 or greater, the barrier layer comprising silicon oxynitride; and effective to prevent diffusion of copper therethrough. 72. A contact comprising a substantially void-less sputtered and atomic hydrogen reflowed copper fill within an opening and on a nitrided surface of an insulating layer, the opening having a diameter of about 0.25 μm or less and an aspect ratio of about 3:1 or greater, and the nitrided surface providing a non-metal barrier material layer comprising silicon oxynitride and effective to prevent diffusion of copper therethrough into the insulating layer. 73. The contact of claim 72, wherein the insulating layer comprises silicon oxyfluoride. 74. The contact of claim 73, wherein the barrier material is about 5 nm to about 10 nm thick. 75. A semiconductor device comprising an insulative layer having a surface and an opening with a diameter of about 0.25 μm or less and an aspect ratio of about 3:1 or greater, the surface of the insulative layer within the opening comprising a non-metal barrier material layer effective to prevent copper diffusion therethrough, the barrier layer comprising silicon oxynitride; and a substantially void-less contact comprising a sputtered and atomic hydrogen reflowed copper fill over the barrier material within the opening. 76. A semiconductor device comprising a substantially void-less contact within an opening in an insulative layer and disposed over a non-metal barrier material effective to prevent diffusion of copper therethrough into the insulative layer, the opening having a diameter of about 0.25 μm or less and an aspect ratio of about 3:1 or greater, the barrier layer comprising silicon oxynitride, and the contact comprising sputtered and atomic hydrogen reflowed copper. 77. A semiconductor device comprising a substantially void-less contact within an opening in an insulative layer and disposed over a barrier layer disposed over the insulative layer, the barrier layer comprising silicon oxynitride and a nitrided surface of the insulative layer wherein the barrier layer is effective to prevent diffusion of copper therethrough into the insulating layer; the opening having a diameter of about 0.25 μm or less and an aspect ratio of about 3:1 or greater, and the contact comprising sputtered and atomic hydrogen reflowed copper. 78. A semiconductor device, comprising: an opening in an insulating layer having a diameter of about 0.25 μm or less and an aspect ratio of about 3:1 or greater, a non-metal barrier material lining the opening and effective to prevent diffusion of copper therethrough, the barrier layer comprising silicon oxynitride; and a substantially void-less, sputtered and atomic hydrogen reflowed copper fill disposed over the barrier material within the opening. 79. A semiconductor device, comprising: a trench in an insulating layer having a diameter of about 0.25 μm or less and an aspect ratio of about 3:1 or greater, a non-metal barrier material lining the trench and effective to prevent diffusion of copper therethrough, the barrier layer comprising silicon oxynitride; and a substantially void-less, sputtered and atomic hydrogen reflowed copper fill disposed over the barrier material within the trench. 80. A semiconductor circuit, comprising: a substantially void-less contact comprising sputtered and atomic hydrogen reflowed copper disposed over a non-metal barrier material lining an opening of an insulating layer having a diameter of about 0.25 μm or less and an aspect ratio of about 3:1 or greater, the barrier material comprising silicon oxynitride and effective to prevent diffusion of copper therethrough. 81. A memory device, comprising: a memory cell, circuitry, and a substantially void-less contact connected to the memory cell and circuitry, the contact comprising sputtered and atomic hydrogen reflowed copper disposed over a non-metal barrier material lining an opening of an insulating layer having a diameter of about 0.25 μm or less and an aspect ratio of about 3:1 or greater, the barrier material comprising silicon oxynitride and effective to prevent diffusion of copper therethrough. 82. A damascene structure, comprising:a substrate;an insulative layer over the substrate;a contact opening in the insulative layer filled with a substantially void-less conductive material comprising sputtered and atomic hydrogen reflowed copper, a non-metal barrier material comprising silicon oxynitride and interposed between the conductive material and the insulative layer and effective to prevent diffusion of copper therethrough, the opening having a diameter of about 0.25 μm or less and an aspect ratio of about 3:1 or greater; anda trench filled with a conductive material extending to the conductive material within the contact opening. 83. A damascene structure, comprising:a subst rate;an insulative layer over the substrate;a contact opening in the insulative layer filled with a conductive material; anda trench in the insulative layer filed filled with a substantially void-less conductive material comprising sputtered and atomic hydrogen reflowed copper extending to the conductive material within the contact opening, a non-metal barrier material comprising silicon oxynitride and interposed between the conductive material and the insulative layer and effective to prevent diffusion of copper therethrough, the trench having a diameter of about 0.25 μm or less and an aspect ratio of about 3:1 or greater. 84. A damascene structure, comprising:a substrate;an insulative layer over the substrate;a contact opening in the insulative layer filled with a conductive material; anda trench in the insulative layer filled with a conductive material extending to the conductive material within the contact opening;the conductive material within the contact opening and the trench being substantially void-less and comprising sputtered and atomic hydrogen reflowed copper, a non-metal barrier material comprising silicon oxynitride and interposed between the conductive material and the insulative layer and effective to prevent diffusion of copper therethrough, at least one of the contact opening and the trench having a diameter of about 0.25 μm or less and an aspect ratio of about 3:1 or greater. 85. A damascene structure, comprising: an insulative layer with an opening formed therethrough and a trench formed within the insulative layer and extending to the opening, at least one of the opening and the trench having a diameter of about 0.25 μm or less and an aspect ratio of about 3:1 or greater, a non-metal barrier material comprising silicon oxynitride and lining the opening and the trench and effective to prevent diffusion of copper therethrough, and the opening and the trench filled with a substantially void-less conductive material comprising sputtered and atomic hydrogen reflowed copper. 86. A damascene structure, comprising: an opening in an insulative layer and a trench in the insulative layer and extending to the opening, at least one of the opening and the trench having a diameter of about 0.25 μm or less and an aspect ratio of about 3:1 or greater, a non-metal barrier material comprising silicon oxynitride and lining the opening and the trench and effective to prevent diffusion of copper therethrough, and a substantially void-less sputtered and atomic hydrogen reflowed copper fill disposed over the barrier material within the opening and the trench. 87. A memory device in an integrated circuit, comprising an opening in an insulating layer having a diameter of about 0.25 μm or less and an aspect ratio of about 3:1 or greater, a non-metal barrier material comprising silicon oxynitride and lining the opening and effective to prevent diffusion of copper therethrough, and a substantially void-less sputtered and atomic hydrogen reflowed copper fill disposed over the barrier material within the opening. 88. A memory device in an integrated circuit, comprising a trench in an insulating layer having a diameter of about 0.25 μm or less and an aspect ratio of about 3:1 or greater, a non-metal barrier material comprising silicon oxynitride and lining the trench and effective to prevent diffusion of copper therethrough, and a substantially void-less, sputtered and atomic hydrogen reflowed copper fill disposed over the barrier material within the trench. 89. A microprocessor, comprising:an integrated circuit comprising a substantially void-less contact comprising sputtered and atomic hydrogen reflowed copper disposed over a non-metal barrier material comprising silicon oxynitride and lining an opening in an insulating layer having a diameter of about 0.25 μm or less and an aspect ratio of about 3:1 or greater, the barrier material effective to prevent diffusion of copper therethrough. 90. A microprocessor, comprising:an integrated circuit comprising a substantially void-less interconnect comprising sputtered and atomic hydrogen reflowed copper disposed over a non-metal barrier material comprising silicon oxynitride and lining an opening in an insulating layer having a diameter of about 0.25 μm or less and an aspect ratio of about 3:1 or greater, the barrier material effective to prevent diffusion of copper therethrough. 91. A microprocessor, comprising:an integrated circuit comprising a damascene structure, the damascene structure comprising an insulative layer with an opening formed therethrough and a trench formed within the insulative layer and extending to the opening, at least one of the opening and the trench having a diameter of about 0.25 μm or less and an aspect ratio of about 3:1 or greater, a non-metal barrier material comprising silicon oxynitride and lining the opening and the trench and effective to prevent diffusion of copper therethrough, and the opening and the trench filled with a substantially void-less conductive material comprising sputtered and atomic hydrogen reflowed copper. 92. A non-metal barrier layer interposed between a copper fill and an insulative layer, the barrier layer comprising silicon oxynitride and a nitrided portion of the insulative layer effective to prevent diffusion of copper therethrough, the copper fill being substantially void-less and comprising sputtered and atomic hydrogen reflowed copper, the copper fill disposed in an opening in the insulative layer having a diameter of about 0.25 μm or less and an aspect ratio of about 3:1 or greater. 93. The barrier layer of claim 92, wherein the insulative layer comprises silicon oxyfluoride. 94. The barrier layer of claim 92, wherein the barrier layer has a thickness of about 5 nm to about 10 nm.
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