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A semiconductor wafer includes a plurality of areas and an array of dice disposed within each of the areas. The feature of the present invention is that at least two fiducial marks are disposed in each of the areas. The present invention further provides a method of testing a sawed semiconductor waf

A semiconductor wafer includes a plurality of areas and an array of dice disposed within each of the areas. The feature of the present invention is that at least two fiducial marks are disposed in each of the areas. The present invention further provides a method of testing a sawed semiconductor wafer.

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1. A testing method comprising the steps of:providing a diced wafer comprising at least a first area and a second area, wherein both the first area and the second area include at least two fiducial marks and an array of dice each having a plurality of electrical contacts;providing a prober having a

1. A testing method comprising the steps of:providing a diced wafer comprising at least a first area and a second area, wherein both the first area and the second area include at least two fiducial marks and an array of dice each having a plurality of electrical contacts;providing a prober having a plurality of interconnect contacts;searching the at least two fiducial marks in the first area of the wafer and obtaining all coordinates of the dice within the first area of the wafer by a pattern recognition system;placing the interconnect contacts of the prober in electrical communication with the electrical contacts of the dice of the first area according to the coordinates of the dice within the first area;searching the at least two fiducial marks in the second area of the wafer and obtaining all coordinates of the dice of the second area of the wafer by the pattern recognition system; andplacing the interconnect contacts of the prober in electrical communication with the electrical contacts of the dice of the second area according to the coordinates of the dice within the second area. 2. The testing method as claimed in claim 1, wherein the electrical contacts of the dice comprise bumped contacts. 3. The testing method as claimed in claim 1, wherein the at least two fiducial marks are disposed in two diagonal corners of the first area. 4. The testing method as claimed in claim 1, wherein the at least two fiducial marks are patterns. 5. The testing method as claimed in claim 1, wherein the at least two fiducial marks are right-angle edges of two dice disposed in two diagonal corners of the first area. 6. The testing method as claimed in claim 1, wherein the at least two fiducial marks are circuit features of two dice disposed in two diagonal corners of the first area. 7. The testing method as claimed in claim 1, wherein the at least two fiducial marks are patterns in the shape of a cross. 8. A testing method comprising the steps of:a) providing a diced wafer comprising an array of dice each having a plurality of electrical contacts;b) providing a prober having a plurality of interconnect contacts;c) dividing the surface of the diced wafer into N areas, wherein each area includes at least two fiducial marks;d) searching the at least two fiducial marks in one of the N areas of the diced wafer and obtaining all coordinates of the dice in the area by a pattern recognition system;e) moving the interconnect contacts of the prober toward the electrical contacts of each die according to all coordinates of the dice obtained in step d) and evaluating the position deviation between the interconnect contacts of the prober and the electrical contacts of the dice;f) when the position deviation is larger than a predetermined allowable deviation value, repeating step c) to step d) but increasing the number of the areas at least one at a time until the position deviation obtained from step e) is smaller than the predetermined allowable deviation value thereby determining that the wafer should be divided into f areas each area including at least two fiducial marks;g) after conducting the step f), searching the at least two fiducial marks in one of the f areas of the diced wafer and obtaining all coordinate of the dice in the area by a pattern recognition system;h) placing the interconnect contacts of the prober in electrical communication with the electrical contacts of each die according to all coordinates of the dice obtained in step g). 9. The testing method as claimed in claim 8, wherein the electrical contacts of the dice are bumped contacts. 10. The testing method as claimed in claim 8, wherein the at least two fiducial marks are disposed in two diagonal corners of each area. 11. The testing meted as claimed in claim 8, wherein the at least two fiducial marks are patterns. 12. The testing method as claimed in claim 8, wherein the at least two fiducial marks are right-angle edges of two dice disposed in two diagonal corners of each area. 1 3. The testing method as claimed in claim 8, wherein the at least two fiducial marks are circuit features of two dice disposed in two diagonal corners of each area. 14. The testing method as claimed in claim 8, wherein the at least two fiducial marks are patterns in the shape of a cross.