IPC분류정보
국가/구분 |
United States(US) Patent
등록
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국제특허분류(IPC7판) |
|
출원번호 |
US-0222361
(2002-08-16)
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발명자
/ 주소 |
- Jeng, Shin-Puu
- Hou, Shang-Yun
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출원인 / 주소 |
- Taiwan Semiconductor Manufacturing Company
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대리인 / 주소 |
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인용정보 |
피인용 횟수 :
9 인용 특허 :
11 |
초록
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A method of forming at least one aluminum/copper clad interconnect comprising the following steps. A substrate is provided having an overlying patterned dielectric layer. The patterned dielectric layer having at least one lower opening. The at least one lower opening is lined with a first barrier la
A method of forming at least one aluminum/copper clad interconnect comprising the following steps. A substrate is provided having an overlying patterned dielectric layer. The patterned dielectric layer having at least one lower opening. The at least one lower opening is lined with a first barrier layer. At least one planarized copper portion is formed within the at least one first barrier layer lined lower opening. A patterned layer is formed over the at least one planarized copper portion and the patterned dielectric layer. The patterned layer has at least one upper opening exposing at least a portion of the at least one planarized copper portion. The at least one upper opening is lined with a second barrier layer. At least one aluminum portion is formed within the at least one second barrier layer lined opening to form the at least one aluminum/copper clad interconnect.
대표청구항
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1. A method of forming at least one aluminum/copper clad routing layer, comprising the steps of:providing a substrate having an overlying patterned dielectric layer; the patterned dielectric layer having at least one lower opening;lining the at least one lower opening with a first barrier layer;form
1. A method of forming at least one aluminum/copper clad routing layer, comprising the steps of:providing a substrate having an overlying patterned dielectric layer; the patterned dielectric layer having at least one lower opening;lining the at least one lower opening with a first barrier layer;forming at least one lower copper routing layer portion within the at least one first barrier layer lined lower opening;forming a patterned layer over the at least one lower copper routing layer portion and the patterned dielectric layer; the patterned layer having at least one upper opening exposing at least a portion of the at least one lower copper routing layer portion;lining the at least one upper opening with a second barrier layer; andforming at least one upper aluminum routing layer portion within the at least one second barrier layer lined upper opening to form the at least one aluminum/copper clad routing layer. 2. The method of claim 1, wherein the substrate is a silicon substrate, the patterned dielectric layer is comprised of a material selected from the group consisting of USG, FSG and Black Diamond™; the first barrier layer is comprised of TaN or Ta; the patterned layer is comprised of a SiN/PEOX/SiN stack; and the second barrier layer 44 is comprised of TaN or Ta. 3. The method of claim 1, wherein the substrate is a silicon substrate, the patterned dielectric layer is comprised of USC; the first barrier layer is comprised of TaN; the patterned layer is comprised of a SiN/PEOX/SiN stack; and the second barrier layer is comprised of TaN. 4. The method of claim 1, wherein the first barrier layer has a thickness of from about 250 to 1000 Å; the at least one planarized copper portion has a thickness of from about 1 to 3 μm; the patterned layer has a thickness of from about 5300 to 13,000 Å; and the second barrier layer has a thickness of from about 250 to 800 Å. 5. The method of claim 1, wherein the first barrier layer has a thickness of from about 500 to 600 Å; the patterned layer has a thickness of about 8750 Å; and the second barrier layer has a thickness of about 600 Å. 6. The method of claim 1, wherein the patterned layer is comprised of a lower SiN layer having a thickness of from about 500 to 1000 Å; a middle PEOX layer having a thickness of from about 2000 to 6000 Å; and an upper SiN layer having a thickness of from about 2800 to 6000 Å. 7. The method of claim 1, wherein the patterned layer is comprised of a lower SiN layer having a thickness of about 750 Å; a middle PEOX layer having a thickness of about 4000 Å; and an upper SiN layer having a thickness of about 4000 Å. 8. The method of claim 1, wherein the at least one lower copper routing layer portion is planarized by a chemical mechanical polishing process and the at least one upper aluminum routing layer portion is patterned using a photolithography and etching process. 9. The method of claim 1, including the step of forming a passivation layer over the patterned layer and the at least one upper aluminum routing layer portion. 10. The method of claim 1, including the step of forming a patterned passivation layer over the patterned layer and the at least one upper aluminum routing layer portion; the patterned passivation layer having at least one opening exposing at least a portion of the at least one upper aluminum routing layer portion. 11. The method of claim 1, wherein the at least one aluminum/copper clad routing layer is selected from the group consisting of: a pad; an RDL metal line; and a fuse, wherein no metal layer is formed thereabove. 12. A method of forming at least one aluminum/copper clad routing layer, comprising the steps of:providing a substrate having an overlying patterned dielectric layer; the patterned dielectric layer having at least one lower opening;lining the at least one lower opening with a first barrier layer;forming a copper layer over the first barrier layer to at least fill the at least one first barrier layer lined lower opening;planarizing the copper layer to form at least one lower copper routing layer portion within the at least one first barrier layer lined lower opening;forming a patterned layer over the at least one lower copper routing layer portion and the patterned dielectric layer; the patterned layer having at least one upper opening exposing at least a portion of the at least one lower copper routing layer portion;lining the at least one upper opening with a second barrier layer;forming an aluminum layer over the second barrier layer to at least fill the at least one second barrier layer lined upper opening; andpatterning the aluminum layer to form at least one upper aluminum routing layer portion within the at least one second barrier layer lined upper opening to form the at least one aluminum/copper clad routing layer. 13. The method of claim 12, wherein the substrate is a silicon substrate, the patterned dielectric layer is comprised of a material selected from the group consisting of USG, FSG and Black Diamond™; the first barrier layer is comprised of TaN or Ta; the patterned layer is comprised of a SiN/PEOX/SiN stack; and the second barrier layer is comprised of TaN or Ta. 14. The method of claim 12, wherein the substrate is a silicon substrate, the patterned dielectric layer is comprised of USC; the first barrier layer is comprised of TaN; the patterned layer is comprised of a SiN/PEOX/SiN stack; and the second barrier layer is comprised of TaN. 15. The method of claim 12, wherein the first barrier layer has a thickness of from about 250 to 1000 Å; the at least one planarized copper portion has a thickness of from about 1 to 3 μm; the patterned layer has a thickness of from about 5300 to 13,000 Å; and the second barrier layer has a thickness of from about 250 to 800 Å. 16. The method of claim 12, wherein the first barrier layer has a thickness of from about 500 to 600 Å; the patterned layer has a thickness of about 8750 Å; and the second barrier layer has a thickness of about 600 Å. 17. The method of claim 12, wherein the patterned layer is comprised of a lower SiN layer having a thickness of from about 500 to 1000 Å; a middle PEOX layer having a thickness of from about 2000 to 6000 Å; and an upper SiN layer having a thickness of from about 2800 to 6000 Å. 18. The method of claim 12, wherein the patterned layer is comprised of a lower SiN layer having a thickness of about 750 Å; a middle PEOX layer having a thickness of about 4000 Å; and an upper SiN layer having a thickness of about 4000 Å. 19. The method of claim 12, wherein the at least one lower copper routing layer portion is planarized by a chemical mechanical polishing process and the at least one upper aluminum routing layer portion is patterned using a photolithography and etching process. 20. The method of claim 12, including the step of forming a passivation layer over the patterned layer and the at least one upper aluminum routing layer portion. 21. The method of claim 12, including the step of forming a patterned passivation layer over the patterned layer and the at least one upper aluminum routing layer portion; the patterned passivation layer having at least one opening exposing at least a portion of the at least one upper aluminum routing layer portion. 22. The method of claim 12, wherein the at least one aluminum/copper clad routing layer is selected from the group consisting of: a pad; an RDL metal line; and a fuse. 23. A method of forming at least one aluminum/copper clad routing layer, comprising the steps of:providing a substrate having an overlying patterned dielectric layer; the patterned dielectric layer having at least one lower opening;lining the at least one lower opening with a first barrier layer;forming a copper layer over the first barrier layer to at least fill the at least one first barrier layer lined lower opening;planarizing the copper layer to form at least one lower copper routing layer portion within the at least one first barrier layer lined lower opening;forming a patterned SiN/PEOX/SiN stack layer over the at least one lower copper routing layer portion and the patterned dielectric layer; the patterned SiN/PEOX/SiN stack layer having at least one upper opening exposing at least a portion of the at least one lower copper routing layer portion;lining the at least one upper opening with a second barrier layer;forming an aluminum layer over the second barrier layer to at least fill the at least one second barrier layer lined upper opening; andpatterning the aluminum layer to form at least one upper aluminum routing layer portion within the at least one second barrier layer lined opening to form the at least one aluminum/copper clad routing layer. 24. The method of claim 23, wherein the substrate is a silicon substrate, the patterned dielectric layer is comprised of a low-k material selected from the group consisting of USG, FSG and Black Diamond™; the first barrier layer is comprised of TaN or Ta; and the second barrier layer is comprised of TaN or Ta. 25. The method of claim 23, wherein the substrate is a silicon substrate, the patterned dielectric layer is comprised of USG; the first barrier layer is comprised of TaN; and the second barrier layer is comprised of TaN. 26. The method of claim 23, wherein the first barrier layer has a thickness of from about 250 to 1000 Å; the at least one planarized copper portion has a thickness of from about 1 to 3 μm; the SiN/PEOX/SiN stack layer has a thickness of from about 5300 to 13,000 Å; and the second barrier layer has a thickness of from about 250 to 800 Å. 27. The method of claim 23, wherein the first barrier layer has a thickness of from about 500 to 600 Å; the SiN/PEOX/SiN stack layer has a thickness of about 8750 Å; and the second barrier layer has a thickness of about 600 Å. 28. The method of claim 23, wherein the SiN/PEOX/SiN stack layer is comprised of a lower SiN layer having a thickness of from about 500 to 1000 Å; a middle PEOX layer having a thickness of from about 2000 to 6000 Å; and an upper SiN layer having a thickness of from about 2800 to 6000 Å. 29. The method of claim 23, wherein the SiN/PEOX/SiN stack layer is comprised of a lower SiN layer having a thickness of about 750 Å; a middle PEOX layer having a thickness of about 4000 Å; and an upper SiN layer having a thickness of about 4000 Å. 30. The method of claim 23, wherein the at least one lower copper routing layer portion is planarized by a chemical mechanical polishing process and the at least one upper aluminum routing layer portion is patterned using a photolithography and etching process. 31. The method of claim 23, including the step of forming a passivation layer over the patterned layer and the at least one upper aluminum routing layer portion. 32. The method of claim 23, including the step of forming a patterned passivation layer over the patterned layer and the at least one upper aluminum routing layer portion; the patterned passivation layer having at least one opening exposing at least a portion of the at least one upper aluminum routing layer portion. 33. The method of claim 23, wherein the at least one aluminum/copper clad routing layer is selected from the group consisting of: a pad; an RDL metal line; and a fuse.
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