[미국특허]
Method for the manufacture of an insulated gate field effect semiconductor device
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
H01L-021/336
B08B-009/027
출원번호
US-0379763
(1995-01-27)
우선권정보
JP-0026594 (1984-02-15); JP-0263279 (1984-12-13)
발명자
/ 주소
Yamazaki, Shunpei
출원인 / 주소
Semiconductor Energy Laboratory Co., Ltd.
대리인 / 주소
Robinson Eric J.
인용정보
피인용 횟수 :
15인용 특허 :
163
초록▼
A method for the manufacture of an insulated gate field effect semiconductor device comprised of a semiconductor substrate, a gate insulating layer member having at least an insulating layer, and a gate electrode. The insulating layer is formed of silicon or aluminum nitride on the semiconductor sub
A method for the manufacture of an insulated gate field effect semiconductor device comprised of a semiconductor substrate, a gate insulating layer member having at least an insulating layer, and a gate electrode. The insulating layer is formed of silicon or aluminum nitride on the semiconductor substrate or the gate electrode by a photo CVD process.
대표청구항▼
1. A method of manufacturing a semiconductor device having at least a gate electrode, a gate insulating film on the gate electrode, an amorphous semiconductor layer on the gate insulating film and a pair of n+ type semiconductor layers formed on the amorphous semiconductor layer, said method compris
1. A method of manufacturing a semiconductor device having at least a gate electrode, a gate insulating film on the gate electrode, an amorphous semiconductor layer on the gate insulating film and a pair of n+ type semiconductor layers formed on the amorphous semiconductor layer, said method comprising the steps of:placing a substrate having said gate electrode formed thereon in a reaction chamber;introducing a film forming gas into said reaction chamber;forming said gate insulating film on sais gate electrode by exciting said film forming gas in said reaction chamber;introducing a cleaning gas into said reaction chamber after the formation of said gate insulating film;etching an unnecessary layer formed on an inside of said reaction chamber by exciting said cleaning gas;forming said pair of n+ type semiconductor layers on said amorphous semiconductor layer; andforming source and drain electrodes on said pair of n+ type semiconductor layers,wherein an inner edge and an outer edge of said pair of n+ type semiconductor layers are coextensive with an inner edge and an outer edge of said source and drain electrodes. 2. A method according to claim 1 wherein said reaction chamber is evacuated during said etching. 3. A Method according to claim 1 wherein said gate insulating film is formed by photo CVD. 4. A method according to claim 1 wherein said reaction chamber is evacuated by utilizing a turbo-molecular pump connected with a rotary pump during said etching. 5. A method according to claim 1 wherein said gate insulating film comprises silicon nitride. 6. A method according to claim 1 wherein said cleaning gas comprises a method selected from the group consisting of HF, NCL 3 , NF 3 and N 2 F 4 . 7. The method according to claim 1 further comprising a step of evacuating said reaction chamber both during said forming and said etching using a turbo-molecular pump. 8. The method according to claim 7 wherein said reaction chamber is evacuated both during said forming and said etching using said turbo-molecular pump in tandem with a rotary pump. 9. The method according to claim 1 wherein said cleaning gas comprises nitrogen fluoride and said method further comprises the steps of:introducing a second cleaning gas comprising hydrogen into said reaction chamber after said etching; andcleaning the inside of said reaction chamber by exciting said second cleaning gas. 10. A method of manufacturing a semiconductor device having at least a gate electrode, a gate insulating film on the gate electrode, and a semiconductor layer on the gate insulating film, said method comprising the steps of:placing a substrate having said gate electrode formed thereon in a reaction chamber;introducing a film forming gas into said reaction chamber;forming said gate insulating film on said gate electrode by exciting said film forming gas in said reaction chamber;introducing a cleaning gas into said reaction chamber after the formation of said gate insulating film;etching an unnecessary layer formed on an inside of said reaction chamber by exciting said cleaning gas,wherein said gate insulating film comprises silicon nitride. 11. A method according to claim 10 wherein said reaction chamber is evacuated during said etching. 12. A method according to claim 10 wherein said gate insulating film is formed by photo CVD. 13. A method according to claim 10 wherein said reaction chamber is evacuated by utilizing a turbo-molecular pump connected with a rotary pump during said etching. 14. The method according to claim 10 further comprising a step of evacuating said reaction chamber both during said forming and said etching using a turbo-molecular pump. 15. The method according to claim 14 wherein said reaction chamber is evacuated both during said forming and said etching using said turbo-molecular pump in tandem with a rotary pump. 16. The method according to claim 10 wherein said cleaning gas comprises nitrogen fluoride and said method further comprises the steps of:i ntroducing a second cleaning gas comprising hydrogen into said reaction chamber after said etching; andcleaning the inside of said reaction chamber by exciting said second cleaning gas. 17. A method of manufacturing a semiconductor device having at least a gate electrode, a gate insulating film adjacent to the gate electrode, and a semiconductor adjacent to the gate insulating film, said method comprising the steps of:introducing a film forming gas into said reaction chamber;forming said gate insulating film in said reaction chamber;introducing a cleaning gas into said reaction chamber after the formation of said gate insulating film;etching an unnecessary layer formed on an inside of said reaction chamber by exciting said cleaning gas,wherein said gate insulating film comprises silicon nitride. 18. The method according to claim 17 further comprising a step of evacuating said reaction chamber during said etching using a turbo-molecular pump. 19. The method according to claim 18 wherein said reaction chamber is evacuated during said etching with said turbo-molecular pump in tandem with a rotary pump. 20. The method according to claim 17 further comprising a step of evacuating said reaction chamber both during said forming and said etching using a turbo-molecular pump. 21. The method according to claim 20 wherein said reaction is evacuated both during said forming and said etching using said turbo-molecular pump in tandem with a rotary pump. 22. The method according to claim 17 wherein said cleaning gas comprises nitrogen fluoride and said method further comprises the steps of:introducing a second cleaning gas comprising hydrogen into said reaction chamber after said etching; andcleaning the inside of said reaction chamber by exciting said second cleaning gas. 23. The method according to claim 17 wherein said gate insulating film is formed by photo CVD. 24. A method of manufacturing a semiconductor device having at least a gate electrode, a gate insulating film adjacent to the gate electrode, and a semiconductor adjacent to the gate insulating film, said method comprising the steps of:introducing a film forming gas into said reaction chamber;forming said gate insulating film in said reaction chamber;introducing a cleaning gas into said reaction chamber after the formation of said gate insulating film;etching an unnecessary layer formed on an inside of said reaction chamber by exciting said cleaning gas,wherein said gate insulating film comprises silicon nitride, andwherein said gas insulating film is formed on said semiconductor. 25. The method according to claim 24 further comprising a step of evacuating said reaction chamber during said etching using a turbo-molecular pump. 26. The method according to claim 25 wherein said reaction chamber is evacuated during said etching with said turbo-molecular pump in tandem with a rotary pump. 27. The method according to claim 24 further comprising a step of evacuating said reaction chamber both during said forming and said etching using a turbo-molecular pump. 28. The method according to claim 27 wherein said reaction chamber is evacuated both during said forming and said etching using said turbo-molecular pump in tandem with a rotary pump. 29. The method according to claim 24 wherein said cleaning gas comprises nitrogen fluoride and said method further comprises the steps of:introducing a second cleaning gas comprising hydrogen into said reaction chamber after said etching; andcleaning the inside of said reaction chamber by exciting said second cleaning gas. 30. The method according to claim 24 wherein said gate insulating film is formed by photo CVD. 31. A method of manufacturing an insulated gate field effect transistor comprising the steps of:forming a gate electrode over a substrate;forming a gate insulating film adjacent to said gate electrode by CVD in a reaction chamber;introducing a cleaning gas comprising NF 3 into said reaction chamber after the formation of said gate insulat ing film;exciting said cleaning gas in order to remove an unnecessary layer from an inside of said reaction chamber, wherein said unnecessary layer comprises a material which is formed during the formation of said gate insulating film. 32. The method according to claim 31 wherein said gate electrode is formed below said gate insulating film. 33. The method according to claim 31 wherein said gate insulating film comprises silicon nitride. 34. The method according to claim 31 wherein said gate insulating film is formed by photo CVD. 35. The method according to claim 31 wherein said substrate is a semiconductor substrate. 36. A method of manufacturing an insulated gate field effect transistor comprising the steps of:forming a gate electrode over a substrate;forming a gate insulating film adjacent to said gate electrode by CVD in a reaction chamber;introducing a cleaning gas comprising NF 3 into said reaction chamber after the formation of said gate insulating film;exciting said cleaning gas in order to remove an unnecessary layer from an inside of said reaction chamber, wherein said unnecessary layer comprises a material which is formed during the formation of said gate insulating film,wherein said gate electrode is formed on said gate insulating film. 37. The method according to claim 36 wherein said gate insulating film comprises silicon nitride. 38. The method according to claim 36 wherein said gate insulating film is formed by photo CVD. 39. The method according to claim 36 wherein said substrate is a semiconductor substrate. 40. A method of manufacturing an insulated gate field effect transistor comprising the steps of:forming a gate electrode comprising a material selected from the group consisting of Mo, Ti, W, WSi 2 , MoSi 2 , and TiSi 2 over a substrate;forming a gate insulating film adjacent to said gate electrode by CVD in a reaction chamber;introducing a cleaning gas comprising NF 3 into said reaction chamber after the formation of said gate insulating film;exciting said cleaning gas in order to remove an unnecessary layer from an inside of said reaction chamber, wherein said unnecessary layer comprises a material which is formed during the formation of said gate insulating film. 41. The method according to claim 40 wherein said gate electrode is formed below the gate insulating film. 42. The method according to claim 40 wherein said gate insulating film comprises silicon nitride. 43. The method according to claim 40 wherein said gate insulating film is formed by photo CVD. 44. The method according to claim 40 wherein said substrate is a semiconductor substrate. 45. The method according to claim 40 wherein said gate insulating film comprises silicon nitride. 46. The method according to claim 40 wherein said gate insulating film is formed by photo CVD. 47. The method according to claim 40 wherein said substrate is a semiconductor substrate. 48. A method of manufacturing an insulated gate field effect transistor comprising the steps of:forming a gate electrode comprising a material selected from the group consisting of Mo, Ti, W, WSi 2 , MoSi 2 , and TiSi 2 over a substrate;forming a gate insulating film adjacent to said gate electrode by CVD in a reaction chamber;introducing a cleaning gas comprising NF 3 into said reaction chamber after the formation of said gate insulating film;exciting said cleaning gas in order to remove an unnecessary layer from an inside of said reaction chamber, wherein said unnecessary layer comprises a material which is formed during the formation of said gate insulating film,wherein said gate electrode is formed on said gate insulating film.
Shufflebotham Paul K. (Fremont CA) Hartsough Larry D. (Berkeley CA) Denison Dean R. (San Jose CA), Apparatus and method for magnetron in-situ cleaning of plasma reaction chamber.
Foster Robert (San Francisco CA) Wang David N. (Cupertino CA) Somekh Sasson (Redwood City CA) Maydan Dan (Los Altos Hills CA), Apparatus and method for magnetron-enhanced plasma-assisted chemical vapor deposition.
Cann Gordon L. (Laguna Beach CA) Shepard ; Jr. Cecil B. (Laguna Beach CA) McKevitt Frank X. (Anaheim Hills CA), Apparatus and method for plasma deposition.
Kamiya Osamu (Machida JPX) Nishida Keijiro (Kanagawa JPX) Fujiyama Yasutomo (Yokohama JPX) Ogawa Kyosuke (Sakorashimachi JPX), Apparatus and process for mass production of film by vacuum deposition.
Yamazaki Shunpei (Tokyo JPX) Tashiro Mamoru (Tokyo JPX) Miyazaki Minoru (Tokyo JPX), Apparatus for chemical vapor deposition and method of film deposition using such deposition.
Hirooka Masaaki (Toride JPX) Ishihara Shunichi (Ebina JPX) Hanna Junichi (Yokohama JPX) Shimizu Isamu (Yokohama JPX), Apparatus for continuously preparing a light receiving element for use in photoelectromotive force member or image-readi.
Brien Guy (Farnham CAX) Cloutier Richard (Granby CAX) Darwall Edward C. D. (Waterloo CAX) Szolgyemy Laszlo (Bromont CAX), Chemical vapor deposition apparatus with manifold enveloped by cooling means.
Provence John D. (Mesquite TX) Brown Frederick W. (Colleyville TX) Jones John I. (Plano TX), Dual detector system for determining endpoint of plasma etch process.
Collins George J. (Ft. Collins CO) Thompson Lance R. (Ft. Collins CO) Rocca Jorge J. (Ft. Collins CO) Boyer Paul K. (Ft. Collins CO), Electron beam induced chemical vapor deposition.
Reif L. Rafael (Brookline MA) Donahue Thomas J. (Cambridge MA) Burger Wayne R. (Belmont MA), Growth of epitaxial films by chemical vapor deposition utilizing a surface cleaning step immediately before deposition.
Benzing David W. (San Jose CA) Benzing Jeffrey C. (San Jose CA) Boren Arthur D. (San Jose CA) Tang Ching C. (San Francisco CA), In-situ CVD chamber cleaner.
Tam Simon W. (San Francisco CA) Reade Ronald P. (Palo Alto CA) Wong Jerry Y. K. (Union City CA) Wang David N. (Cupertino CA), In-situ photoresist capping process for plasma etching.
Gupta Arunava (Madison NJ) West Gary A. (Dover NJ) Beeson Karl W. (Princeton NJ), Light induced chemical vapor deposition of conductive titanium silicide films.
Keyser Thomas (Palm Bay FL) Cairns Bruce R. (Los Altos Hills CA) Anand Kranti V. (Sunnyvale CA) Petro William G. (Cupertino CA) Barry Michael L. (Palo Alto CA), Low temperature plasma nitridation process and applications of nitride films formed thereby.
Meyerson Bernard S. (Yorktown Heights NY), Method and apparatus for low temperature, low pressure chemical vapor deposition of epitaxial silicon layers.
Brodsky Marc H. (Mt. Kisco NY) Scott Bruce A. (Pleasantville NY), Method for depositing silicon films and related materials by a glow discharge in a disiland or higher order silane gas.
Ishihara Shunichi (Ebina JPX) Hirooka Masaaki (Nabari JPX) Ohno Shigeru (Yokohama JPX), Method for forming deposition film using Si compound and active species from carbon and halogen compound.
Ovshinsky Stanford R. (Bloomfield Hills MI) Allred David D. (Troy MI) Walter Lee (Bloomfield Hills MI) Hudgens Stephen J. (Southfield MI), Method of depositing semiconductor films by free radical generation.
Yamazaki Shunpei (21-21 Kitakarasuyama 7-chome Setagaya-ku ; Tokyo JPX), Method of manufacturing a multiple-layer, non-single-crystalline semiconductor on a substrate.
Maydan Dan (Los Altos Hills CA) Somekh Sasson (Redwood City CA) Wang David N. (Cupertino CA) Cheng David (San Jose CA) Toshima Masato (San Jose CA) Harari Isaac (Mountain View CA) Hoppe Peter D. (Sun, Multi-chamber integrated process system.
Cannella Vincent D. (Detroit MI) Izu Masatsugu (Birmingham MI) Hudgens Stephen J. (Southfield MI), Multiple chamber deposition and isolation system and method.
Yamazaki Shunpei (21-21 Kitakarasuyama 7-chome Setagaya-ku ; Tokyo JPX), Non-single-crystalline semiconductor layer on a substrate and method of making same.
Allred David D. (Troy MI) Walter Lee (Bloomfield Hills MI) Reyes Jaime M. (Birmingham MI) Ovshinsky Stanford R. (Bloomfield Hills MI), Photo-assisted CVD.
Cuomo Jerome J. (Lincolndale NY) Guarnieri Charles R. (Somers NY), Photoelectric enhanced plasma glow discharge system and method including radiation means.
Seelbach Christian A. (Scottsdale AZ) Ingle William M. (Phoenix AZ) Goetz Carl A. (Scottsdale AZ), Process and apparatus for the low pressure chemical vapor deposition of thin films.
Fraas Lewis M. (Malibu CA) Zanio Kenneth R. (Agoura CA) Knechtli Ronald C. (Woodland Hills CA), Process for fabricating heterojunction structures utilizing a double chamber vacuum deposition system.
Hogan Richard H. (Austin TX) Dahm Jonathan C. (Austin TX), Process for improving nitride deposition on a semiconductor wafer by purging deposition tube with oxygen.
Alexander ; Jr. Frank B. (Paterson NJ) Capio Cesar D. (Fords NJ) Hauser ; Jr. Victor E. (Palmerton PA) Levinstein Hyman J. (Berkeley Heights NJ) Mogab Cyril J. (Berkeley Heights NJ) Sinha Ashok K. (N, Radial flow reactor including glow discharge limitting shield.
Law Kam S. (Union City CA) Leung Cissy (Fremont CA) Tang Ching C. (San Francisco CA) Collins Kenneth S. (San Jose CA) Chang Mei (Cupertino CA) Wong Jerry Y. K. (Union City CA) Wang David Nin-Kou (Cup, Reactor chamber self-cleaning process.
Chen Lee (Poughkeepsie NY) Hendricks Charles J. (Wappingers Falls NY) Mathad Gangadhara S. (Poughkeepsie NY) Poloncic Stanley J. (Wappingers Falls NY), Single wafer plasma etch reactor.
Wang David N. (Cupertino) White John M. (Hayward) Law Kam S. (Union City) Leung Cissy (Union City) Umotoy Salvador P. (Pittsburg) Collins Kenneth S. (San Jose) Adamik John A. (San Ramon) Perlov Ilya , Thermal CVD/PECVD reactor and use for thermal chemical vapor deposition of silicon dioxide and in-situ multi-step planar.
Moslehi Mehrdad M. (Palo Alto CA) Saraswat Krishna C. (Santa Clara County CA), Thermal/microwave remote plasma multiprocessing reactor and method of use.
Gutermann Alfons (Freigericht DEX) Herzog Heinz (Karlstein DEX) Mohn Heinrich (Gelnhausen DEX) Schlke Karl A. (Neuberg DEX), Transparent fused silica bell for purposes relating to semiconductor technology.
Cohen-Solal Gerard (Chatenay FR) Zozime Alain (Saint-Denis FR) Sella Claude (Meudon La Foret FR), Volatilization and deposition of a semi-conductor substance and a metallic doping impurity.
Yamazaki,Shunpei; Ohtani,Hisashi; Shimada,Hiroyuki; Sakama,Mitsunori; Abe,Hisashi; Teramoto,Satoshi, Manufacturing method of a thin film semiconductor device.
Chua, Thai Cheng; Hung, Steven; Liu, Patricia M.; Sato, Tatsuya; Paterson, Alex M.; Todorov, Valentin; Holland, John P., Method and apparatus for fabricating a high dielectric constant transistor gate using a low energy plasma system.
Olsen, Christopher Sean; Chua, Thai Cheng; Hung, Steven; Liu, Patricia M.; Sato, Tatsuya; Paterson, Alex M.; Todorow, Valentin; Holland, John P., Method and apparatus for fabricating a high dielectric constant transistor gate using a low energy plasma system.
Chua, Thai Cheng; Paterson, Alex M.; Hung, Steven; Liu, Patricia M.; Sato, Tatsuya; Todorow, Valentin; Holland, John P., Method of fabricating a high dielectric constant transistor gate using a low energy plasma apparatus.
Yamazaki, Shunpei; Ohtani, Hisashi; Shimada, Hiroyuki; Sakama, Mitsunori; Abe, Hisashi; Teramoto, Satoshi, Substrate processing apparatus and a manufacturing method of a thin film semiconductor device.
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