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Electroplating process for avoiding defects in metal features of integrated circuit devices 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • C25D-005/18
  • H01L-021/768
출원번호 US-0796856 (2001-02-28)
발명자 / 주소
  • Reid, Jonathan D.
  • Smith, David
  • Mayer, Steven T.
  • Henri, Jon
  • Varadarajan, Sesha
출원인 / 주소
  • Novellus Systems, Inc.
대리인 / 주소
    Beyer, Weaver & Thomas, LLP.
인용정보 피인용 횟수 : 45  인용 특허 : 19

초록

Electroplating methods using an electroplating bath containing metal ions and a suppressor additive, an accelerator additive, and a leveler additive, together with controlling the current density applied to a substrate, avoid defects in plated films on substrates having features with a range of aspe

대표청구항

1. A method of electroplating a metal onto a surface comprising a field region and a plurality of recessed features, the recessed features having a range of aspect ratios, the surface having a metal seed layer, the method comprising:contacting the surface with an electroplating solution comprising m

이 특허에 인용된 특허 (19)

  1. Chen LinLin, Apparatus and method for electrolytically depositing a metal on a microelectronic workpiece.
  2. Wright ; Jr. Leslie S. (Plainwell MI), Chromium plating process and article produced.
  3. Hosoda Yasushi (Amagasaki JPX) Kimoto Masanari (Kobe JPX) Hikino Shinya (Wakayama JPX) Yoshida Tsutomu (Amagasaki JPX) Fukui Kiyoyuki (Kobe JPX), Composite zinc- or zinc alloy-electroplated metal sheet and method for the production thereof.
  4. Combs Daniel J. (Sterling Heights MI), Composition and method for electrodeposition of copper.
  5. McTeer Allen, Copper diffusion barrier, aluminum wetting layer and improved methods for filling openings in silicon substrates with c.
  6. Sonnenberg Wade (Hull MA) Fisher Gordon (Sudbury MA) Bernards Roger F. (Wellesley MA) Houle Patrick (Framingham MA), Copper electroplating solutions and processes.
  7. Landau Uziel ; D'Urso John J. ; Rear David B., Electro deposition chemistry.
  8. Kardos Otto (Ferndale MI) Arcilesi Donald A. (Mount Clemens MI) Valayil Silvester P. (Pontiac MI), Electrodeposition of copper.
  9. Barbieri, Stephen C.; Mayer, Linda J., High speed copper electroplating process and bath therefor.
  10. Tsai Ming-Hsing,TWX ; Tsai Wen-Jye,TWX ; Shue Shau-Lin,TWX ; Yu Chen-Hua,TWX, Method for improvement of gap filling capability of electrochemical deposition of copper.
  11. Reid Jonathan D. ; Contolini Robert J. ; Opocensky Edward C. ; Patton Evan E. ; Broadbent Eliot K., Method of electroplating semiconductor wafer using variable currents and mass transfer to obtain uniform plated layer.
  12. Nguyen Tue ; Ulrich Bruce Dale ; Evans David Russell, Multi-level reticle system and method for forming multi-level resist profiles.
  13. Dodd John R. (Wilmington DE), Polymeric leveling additive for acid electroplating baths.
  14. Lashmore David S. (Frederick MD), Process and bath for electroplating nickel-chromium alloys.
  15. Hubel Egon,DEX, Process and circuitry for generating current pulses for electrolytic metal deposition.
  16. Dahms Wolfgang,DEX ; Meyer Heinrich,DEX ; Kretschmer Stefan,DEX, Process for the electrolytic deposition of metal layers.
  17. Laing ; Nikolaus ; Schaper ; Peter ; Heierli ; Werner, Process for the treatment of metal surfaces by electro-deposition of metal coatings at high current densities.
  18. Dubin Valery ; Ting Chiu ; Cheung Robin W., Pulse electroplating copper or copper alloys.
  19. Dai Chang-Ming,TWX ; Huang Jammy Chin-Ming,TWX, Two-layered TSI process for dual damascene patterning.

이 특허를 인용한 특허 (45)

  1. Weiner, Kurt H.; Verma, Gaurav, Apparatus and methods for fast chemical electrodeposition for fabrication of solar cells.
  2. Weiner, Kurt H.; Verma, Gaurav, Apparatus and methods for fast chemical electrodeposition for fabrication of solar cells.
  3. Chang, Chung-Liang; Shue, Shau-Lin, Apparatus for electrochemical plating semiconductor wafers.
  4. Ganesan, Kousik; Spurlin, Tighe; Reid, Jonathan D.; Ghongadi, Shantinath; McKerrow, Andrew; Duncan, James E., Configuration and method of operation of an electrodeposition system for improved process stability and performance.
  5. Herdman,Roderick D.; Pearson,Trevor; Long,Ernest; Gardner,Alan, Controlling the hardness of electrodeposited copper coatings by variation of current profile.
  6. Richardson, Thomas B.; Zhang, Yun; Wang, Chen; Paneccasio, Jr., Vincent; Wang, Cai; Lin, Xuan; Hurtubise, Richard; Abys, Joseph A., Copper metallization of through silicon via.
  7. Hayashi, Shinjiro; Takiguchi, Hisanori, Copper plating bath formulation.
  8. Hayashi, Shinjiro; Takiguchi, Hisanori, Copper plating process.
  9. Spurlin, Tighe A.; Zhou, Jian; Opocensky, Edward C.; Reid, Jonathan; Mayer, Steven T., Current ramping and current pulsing entry of substrates for electroplating.
  10. Ko, Ting-Chu; Shih, Chien-Hsueh; Tsai, Minghsing, Electro chemical plating additives for improving stress and leveling effect.
  11. En, Honchin; Nakai, Tohru; Oki, Takeo; Hirose, Naohiro; Noda, Kouta, Electroplating process of electroplating an elecrically conductive sustrate.
  12. Cho, Junghyun; Sammakia, Bahgat; Poliks, Mark D.; Magnuson, Roy; Roy, Biplab Kumar, Embedded thin films.
  13. Cho, Junghyun; Sammakia, Bahgat; Poliks, Mark D.; Magnuson, Roy; Roy, Biplab Kumar, Embedded thin films.
  14. Edelstein, Daniel C.; Wong, Keith Kwong Hon; Yang, Chih-Chao; Yang, Haining S., High aspect ratio electroplated metal feature and method.
  15. Condo, Peter D.; Kirkman, Janet R.; Bright, Clark I.; Stoss, Walter, Infrared reflecting films for solar control and other uses.
  16. Opocensky, Edward C.; Spurlin, Tighe A.; Reid, Jonathan D., Method and apparatus for characterizing metal oxide reduction.
  17. Chang, Chung-Liang; Shue, Shau-Lin, Method and apparatus for electrochemical plating semiconductor wafers.
  18. Spurlin, Tighe A.; Merrill, Charles L.; Huang, Ludan; Thorum, Matthew; Brogan, Lee; Duncan, James E.; Wilmot, Frederick D.; Stowell, Robert Marshall; Mayer, Steven T.; Fu, Haiying; Porter, David W.; Ghongadi, Shantinath; Reid, Jonathan D.; Lee, Hyosang S.; Willey, Mark J., Method and apparatus for electroplating semiconductor wafer when controlling cations in electrolyte.
  19. Spurlin, Tighe A.; Antonelli, George Andrew; Doubina, Natalia; Duncan, James E.; Reid, Jonathan D.; Porter, David, Method and apparatus for remote plasma treatment for reducing metal oxides on a metal seed layer.
  20. Mayer, Steven T.; Drewery, John S., Method and apparatus for uniform electropolishing of damascene IC structures by selective agitation.
  21. Yoshida, Nobuyuki, Method for manufacturing multilayer wiring substrate.
  22. Mayer,Steven T.; Reid,Jonathan D.; Rea,Mark L.; Emesh,Ismail T.; Meinhold,Henner W.; Drewery,John S., Method for planar electroplating.
  23. Reid, Jonathan; Varadarajan, Sesha; Emekli, Ugur, Methods and apparatus for depositing copper on tungsten.
  24. Reid, Jonathan; Varadarajan, Sesha; Emekli, Ugur, Methods and apparatus for depositing copper on tungsten.
  25. Spurlin, Tighe A.; Lambert, Darcy E.; Singhal, Durgalakshmi; Antonelli, George Andrew, Methods for reducing metal oxide surfaces to modified metal surfaces using a gaseous reducing environment.
  26. Mayer, Steven T.; Porter, David W., Modulated metal removal using localized wet etching.
  27. Stoss, Walter; Bright, Clark I., Nucleation layer for thin film metal layer formation.
  28. Mayer, Steven T.; Drewery, John Stephen; Webb, Eric G., Photoresist-free metal deposition.
  29. Nagai, Mizuki; Kanda, Hiroyuki; Kurashina, Keiichi; Yamamoto, Satoru; Kimizuka, Ryoichi; Deligianni, Hariklia; Baker, Brett; Kwietniak, Keith; Andricacos, Panayotis; Vereecken, Phillipe, Plating apparatus and plating method.
  30. Basol, Bulent M., Plating methods for low aspect ratio cavities.
  31. Buckalew, Bryan L.; Rea, Mark L., Pretreatment method for photoresist wafer processing.
  32. Buckalew, Bryan L.; Rea, Mark L., Pretreatment method for photoresist wafer processing.
  33. En, Honchin; Nakai, Tohru; Oki, Takeo; Hirose, Naohiro; Noda, Kouta, Printed wiring board and its manufacturing method.
  34. En, Honchin; Nakai, Tohru; Oki, Takeo; Hirose, Naohiro; Noda, Kouta, Printed wiring board and its manufacturing method.
  35. Ponnuswamy, Thomas A.; Pennington, Bryan; Berry, Clifford; Buckalew, Bryan L.; Mayer, Steven T., Pulse sequence for plating on thin seed layers.
  36. Mayer, Steven T.; Drewery, John S.; Hill, Richard S.; Archer, Timothy M.; Kepten, Avishai, Selective electrochemical accelerator removal.
  37. Mayer, Steven T.; Drewery, John; Hill, Richard S.; Archer, Timothy; Kepten, Avishai, Selective electrochemical accelerator removal.
  38. Mayer, Steven T.; Stowell, Marshall R.; Drewery, John S.; Hill, Richard S.; Archer, Timothy M.; Kepten, Avishai, Selective electrochemical accelerator removal.
  39. Farooq, Mukta G.; Fitzsimmons, John A.; Graves-Abe, Troy L., Sidewalls of electroplated copper interconnects.
  40. Farooq, Mukta G.; Fitzsimmons, John A.; Graves-Abe, Troy L., Sidewalls of electroplated copper interconnects.
  41. Farooq, Mukta G.; Fitzsimmons, John A.; Graves-Abe, Troy L., Sidewalls of electroplated copper interconnects.
  42. Farooq, Mukta G.; Fitzsimmons, John A.; Graves-Abe, Troy L., Sidewalls of electroplated copper interconnects.
  43. Mayer, Steven T.; Rea, Mark L.; Hill, Richard S.; Kepten, Avishai; Stowell, R. Marshall; Webb, Eric G., Topography reduction and control by selective accelerator removal.
  44. Mayer, Steven T.; Rea, Mark L.; Hill, Richard S.; Kepten, Avishai; Stowell, R. Marshall; Webb, Eric G., Topography reduction and control by selective accelerator removal.
  45. Buckalew, Bryan L.; Mayer, Steven T; Ponnuswamy, Thomas; Porter, David, Treatment method of electrodeposited copper for wafer-level-packaging process flow.
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