IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
US-0655137
(2003-09-04)
|
우선권정보 |
TW-92203108 U (2003-02-27) |
발명자
/ 주소 |
- Hsu, Han-Cheng
- Chen, Chih-Tse
- Kao, Ching-Man
|
출원인 / 주소 |
|
인용정보 |
피인용 횟수 :
16 인용 특허 :
3 |
초록
▼
Double-layer connector assembly has an upper-layer shielding housing, a lower-layer shielding housing, and a number of two-layer modules. Each two-layer module has an upper unit, a lower unit, and a supporting body. The upper unit has upper output pins and an upper guiding plate, and the lower unit
Double-layer connector assembly has an upper-layer shielding housing, a lower-layer shielding housing, and a number of two-layer modules. Each two-layer module has an upper unit, a lower unit, and a supporting body. The upper unit has upper output pins and an upper guiding plate, and the lower unit has lower output pins and a lower guiding plate. The upper guiding plate and the lower guiding plate are connected by the supporting body and form a slit. Supporting plates of the upper-layer shielding housing and the lower-layer shielding housing are installed into the slit so that the upper-layer shielding housing, the lower-layer shielding housing are installed, and two-layer modules are connected together. Besides, processing circuits are selectively connected to the output pins of the upper and lower units so that the design is more compact.
대표청구항
▼
1. A two-layer connector assembly comprising:a plurality of two-layer modules, each two-layer module comprising:an upper-layer unit having a plurality of upper output pins and an upper guiding plate wherein said upper output pins are installed on said upper guiding plate;a lower-layer unit having a
1. A two-layer connector assembly comprising:a plurality of two-layer modules, each two-layer module comprising:an upper-layer unit having a plurality of upper output pins and an upper guiding plate wherein said upper output pins are installed on said upper guiding plate;a lower-layer unit having a plurality of lower output pins and a lower guiding plate wherein said lower output pins are installed on said lower guiding plate; anda supporting body for connecting said upper-layer unit and said lower-layer unit such that said upper guiding plate and said lower guiding plate aligning in substantially parallel arrangement and a slit being defined between said upper guiding plate and said lower guiding plate;an upper-layer shielding housing wherein said upper-layer shielding comprises a first supporting slice and defines a plurality of upper-layer through holes, and each said upper-layer through hole contains one said upper-layer unit of one said two-layer module; andan lower-layer shielding housing wherein said lower-layer shielding housing comprises a second supporting slice and defines a plurality of lower-layer through holes, and each said lower-layer through hole contains one said lower-layer unit of one said two-layer module;wherein said upper-layer through holes and said lower-layer through holes are arranged as two mirrored rows, and said first supporting slice and said second supporting slice are placed in said slit in the manner of a stack such that said upper shielding housing, said lower shielding housing and said plurality of two-layer modules are connected together. 2. The connector assembly of claim 1, wherein said upper-layer unit of each said two-layer module further comprises:a plurality of upper intermediate devices; anda plurality of upper input pins corresponding to said upper output pins, wherein said upper intermediate device connects said upper output pins and said upper input pins, said upper intermediate device selectively comprises an upper processing circuit for processing signals transmitted between corresponding said upper input pins and said upper output pins; andwherein said lower-layer unit of each said two-layer module further comprises:a plurality of lower intermediate devices; anda plurality of lower input pins corresponding to said lower output pins, said lower intermediate device selectively comprises a lower processing circuit for processing signals transmitted between corresponding said lower input pin and said lower output pin. 3. The connector assembly of claim 2, wherein said upper input pins and lower input pins are connected to a printed circuit board. 4. The connector assembly of claim 3, wherein said supporting body is a circuit board. 5. The connector assembly of claim 4, wherein said upper processing circuits and lower processing circuits are installed on said circuit board. 6. The connector assembly of claim 4, wherein said upper processing circuits and said lower processing circuits comprise LEDs. 7. The connector assembly of claim 1, wherein said upper-layer units and said lower-layer units are sockets. 8. The connector assembly of claim 7, wherein said sockets are RJ-45 sockets. 9. The connector assembly of claim 1 further comprising a fastening means for fixing the connection among said first supporting slice, said second supporting slice, said upper guiding plate, and said lower guiding plate. 10. A two-layer module connected with a printed circuit board comprising:a supporting body;an upper-layer unit comprising a plurality of upper connecting devices and an upper guiding plate, wherein each said upper connecting device comprises an upper output pin, an upper intermediate device and an upper input pin, and wherein said upper input pin is electrically connected to said printed circuit board, said upper output pin is installed on said upper guiding plate, said upper guiding plate is connected to said supporting body, said upper intermediate device is electrically connected to s aid upper output pin and said upper input pin, and said upper intermediate device selectively comprises a upper processing circuit for processing signals transmitted between said upper input pin and said upper output pin; anda lower-layer unit comprising a plurality of lower connecting devices and a lower guiding plate, wherein each said lower connecting device comprises a lower output pin, a lower intermediate device, and a lower input pin, and wherein said lower input pin is electrically connected to said printed circuit board, said lower output pin is installed on said lower guiding plate, said intermediate device is electrically connected to said lower output pin and said lower input pin, said lower intermediate device selectively comprises a lower processing circuit for processing signals transmitted between said lower input pin and said lower output pin,wherein said upper guiding plate and said lower guiding plate are connected to said supporting body and a slit being defined between said upper guiding plate and said lower guiding plate, and said -upper output pin and said lower output pin are extended from said slit and symmetrical to each other. 11. The two-layer module of claim 10, wherein said slit is used for placing a first supporting slice of an upper shielding housing and a second supporting slice of a lower shielding housing such that said upper shielding housing contains said upper-layer unit and said lower shielding housing contains said lower-layer unit. 12. The two-layer module of claim 10, wherein said supporting body is a circuit board. 13. The two-layer module of claim 10, wherein said upper processing circuit and said lower processing circuit are installed on said circuit board. 14. The two-layer module of claim 10, wherein said upper processing circuits and said lower processing circuits comprise LEDs. 15. The two-layer module of claim 10, wherein said upper-layer unit and said lower-layer unit are sockets. 16. The two-layer module of claim 15, wherein said sockets are RJ-45 sockets. 17. A two-layer module connected with a printed circuit board comprising:a supporting body;an upper-layer unit comprising a plurality of upper connecting devices and an upper guiding plate, wherein each said upper connecting device comprises an upper output pin, an upper intermediate device and an upper input pin, and wherein said upper input pin is electrically connected to said printed circuit board, said upper output pin is installed on said upper guiding plate, said upper guiding plate is connected to said supporting body, said upper intermediate device is electrically connected to said upper output pin and said upper input pin, and said upper intermediate device selectively comprises a upper processing circuit for processing signals transmitted between said upper input pin and said upper output pin; anda lower-layer unit comprising a plurality of lower connecting devices and a lower guiding plate, wherein each said lower connecting device comprises a lower output pin, a lower intermediate device, and a lower input pin, and wherein said lower input pin is electrically connected to said printed circuit board, said lower output pin is installed on said lower guiding plate, said intermediate device is electrically connected to said lower output pin and said lower input pin, said lower intermediate device selectively comprises a lower processing circuit for processing signals transmitted between said lower input pin and said lower output pin,wherein said upper guiding plate and said lower guiding plate are connected to said supporting body and a slit being defined between said upper guiding plate and said lower guiding plate for placing a first supporting slice of an upper shielding housing and a second supporting slice of a lower shielding housing such that said upper shielding housing contains said upper-layer unit and said lower shielding housing contains said lower-layer unit, and said upper guiding plate and said lower guiding plate being symmetrical about said slit.
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