IPC분류정보
국가/구분 |
United States(US) Patent
등록
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국제특허분류(IPC7판) |
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출원번호 |
US-0817696
(2001-03-23)
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발명자
/ 주소 |
- Test, Howard R.
- Amador, Gonzalo
- Subido, Willmar E.
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출원인 / 주소 |
- Texas Instruments Incorporated
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대리인 / 주소 |
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인용정보 |
피인용 횟수 :
108 인용 특허 :
29 |
초록
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A robust, reliable and low-cost metal structure and process enabling electrical wire/ribbon connections to the interconnecting copper metallization of integrated circuits. The structure comprises a layer of barrier metal that resists copper diffusion, deposited on the non-oxidized copper surface in
A robust, reliable and low-cost metal structure and process enabling electrical wire/ribbon connections to the interconnecting copper metallization of integrated circuits. The structure comprises a layer of barrier metal that resists copper diffusion, deposited on the non-oxidized copper surface in a thickness such that the barrier layer reduces the diffusion of copper at 250° C. by more than 80% compared with the absence of the barrier metal. The structure further comprises an outermost bondable layer which reduces the diffusion of the barrier metal at 250° C. by more than 80% compared with the absence of the bondable metal. Finally, a metal wire is bonded to the outermost layer for metallurgical connection.The barrier metal is selected from a group consisting of nickel, cobalt, chromium, molybdenum, titanium, tungsten, and alloys thereof. The outermost bondable metal layer is selected from a group consisting of gold, platinum, and silver.
대표청구항
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1. A method for forming metallurgical connections between metal wires and bond pads positioned on integrated circuits having copper interconnecting metallization, comprising the steps of:depositing seed metal to activate the surface of said copper metallization of said bond pads;plating on said seed
1. A method for forming metallurgical connections between metal wires and bond pads positioned on integrated circuits having copper interconnecting metallization, comprising the steps of:depositing seed metal to activate the surface of said copper metallization of said bond pads;plating on said seed metal a barrier layer, by electroless deposition, said barrier layer having a thickness of at least about 0.5 μm, said barrier layer selected from a group consisting of nickel, cobalt, chromium, molybdenum, titanium, tungsten, and alloys thereof;plating on said barrier layer a bondable layer, by electroless deposition, said bondable layer having a thickness of at least about 0.4 μm, said bondable layer selected from a group consisting of gold, palladium, platinum, and silver; andbonding one of said metal wires onto said bondable layer;wherein said step of plating on said barrier layer a bondable layer comprises the steps of:conducting a self-limiting, surface metal replacement; andconducting an autocatalytic deposition. 2. The method of claim 1, wherein said step of plating on said seed metal a barrier layer comprises plating said barrier layer having a thickness in the range of about 0.5 μm to about 1.5 μm. 3. The method of claim 1, wherein said step of plating on said barrier layer a bondable layer comprises plating said bondable layer having a thickness in the range of about 0.4 μm to about 1.5 μm. 4. The method of claim 1, wherein said step of depositing seed metal is preceded by a step comprising:depositing a protective overcoat over the surface of said integrated circuit, including the surface portions having copper metallization; andopening selected areas of said overcoat, exposing the surface of said copper metallization. 5. The method of claim 4, further comprising the step of immersing said exposed surface of said copper metallization in an acid solution. 6. A method for forming metallurgical connections between metal wires and bond pads positioned on integrated circuits having copper interconnecting metallization, comprising:depositing palladium seed metal to activate the surface of said copper metallization of said bond pads;plating on said seed metal a layer of nickel by electroless deposition, said layer of nickel having a thickness of at least about 0.5 μm;plating on said layer of nickel a layer of gold, by electroless deposition, said layer of gold having a thickness of at least about 0.4 μm; andbonding one of said metal wires onto said layer of gold;wherein said step of plating on said nickel layer a layer of gold comprises the steps of:conducting a self-limiting surface metal replacement; andconducting an autocatalytic deposition. 7. The method of claim 6, wherein said step of plating on said seed metal a layer of nickel comprises plating a nickel layer having a thickness in the range of about 0.5 μm to about 1.5 μm. 8. The method of claim 6, wherein said step of plating on said layer of nickel a layer of gold comprises plating a gold layer having a thickness in the range of about 0.4 μm to about 1.5 μm. 9. The method of claim 6, wherein said step of depositing seed metal is preceded by a step comprising:depositing a protective overcoat over the surface of said integrated circuit, including the surface portions having copper metallization; and opening selected areas of said overcoat, exposing the surface of said copper metallization.
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