초록 ▼

Between a positive power supply 18 and a negative power supply 19 , a p-channel transistor 11 and an n-channel transistor 14 are connected in series while a p-channel transistor 12 and an n-channel transistor 15 are also connected in series. An inverted input signal *Sig 1 is input to the respective

Between a positive power supply 18 and a negative power supply 19 , a p-channel transistor 11 and an n-channel transistor 14 are connected in series while a p-channel transistor 12 and an n-channel transistor 15 are also connected in series. An inverted input signal *Sig 1 is input to the respective gates of the transistors 11 and 14 , while an input signal Sig 1 is input to the respective gates of the transistors 12 and 15 . As a result, of a pair of the transistors connected in series, namely either the transistors 11 and 14 or the transistors 12 and 15 , when one transistor turns ON, the other transistor turns OFF. Thus, generation of through currents is prevented.

대표청구항 ▼

1. A level shifter for changing the level of an input signal and outputting the signal, comprising:a first transistor, a second transistor, and a third transistor which are connected in series between a first power supply and a second power supply; anda fourth transistor, a fifth transistor, and a s

1. A level shifter for changing the level of an input signal and outputting the signal, comprising:a first transistor, a second transistor, and a third transistor which are connected in series between a first power supply and a second power supply; anda fourth transistor, a fifth transistor, and a sixth transistor which are connected in series between said first power supply and said second power supply;said first transistor and said forth transistor being transistors of a first conductivity type, andsaid second transistor, said third transistor, said fifth transistor, and said sixth transistor being transistors of a second conductivity type,wherein, of a pair of input signals having complementary phases, one input signal is input to a gate of said first transistor and a gate of said second transistor, and the other input signal is input to a gate of said fourth transistor and a gate of said fifth transistor,a node between said first transistor and said second transistor is connected to a gate of said sixth transistor, and a node between said fourth transistor and said fifth transistor is connected to a gate of said third transistor, andan output signal is output from a node between said fourth and fifth transistors, said output signal being used for level shifting of gate lines for selecting a pixel in an active matrix type crystal-display apparatus. 2. A level shifter according to claim 1, wherein said active matrix type liquid display apparatus comprises:a plurality of gate lines for selecting a pixel;a plurality of signal lines disposed so as to intersect with said gate lines; anda gate line selector for selecting said gate lines,said level shifter being disposed between said gate line selector and each of said gate lines. 3. A level shifter according to claim 2, wherein an active layer of each of said transistors is low temperature poly-silicon. 4. A level shifter according to claim 1, wherein said output signal is further inverted by an inverter. 5. A level shifter for changing the level of an input signal and outputting the signal, comprising:a first transistor, a second transistor, and a third transistor which are connected in series between a first power supply and a second power supply; anda fourth transistor, a fifth transistor, and a sixth transistor which are connected in series between said first power supply and said second power supply;said first transistor and said forth transistor being p-channel transistors, andsaid second transistor, said third transistor, said fifth transistor, and said sixth transistor being n-channel transistors,wherein, of a pair of input signals having complementary phases, one input signal is input to a gate of said first transistor and a gate of said second transistor, and the other input signal is input to a gate of said fourth transistor and a gate of said fifth transistor, anda node between said first transistor and said second transistor is connected to a gate of said sixth transistor, and a node between said fourth transistor and said fifth transistor is connected to a gate of said third transistor, andan output signal is output from a node between said fourth and fifth transistors. 6. A level shifter according to claim 5, wherein said output signal is used for level shifting of gate lines for selecting a pixel in an active matrix type liquid display apparatus. 7. A level shifter according to claim 6, wherein said active matrix type liquid display apparatus comprises:a plurality of said gate lines for selecting a pixel;a plurality of signal lines disposed so as to intersect with said gate lines; anda gate line selector for selecting said gate lines,said level shifter being disposed between said gate line selector and each of said gate lines. 8. A level shifter according to claim 7, wherein an active layer of each of said transistors is low temperature poly-silicon. 9. A level shifter according to claim 5, wherein said output signal is inverted by an inverter.