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A method and apparatus is provided for stress testing integrated circuits to determine their susceptibility to hot carrier charge injection damage. The system includes a hot carrier injection source formed on a semiconductor wafer carrying the ICs under test. The carrier source comprises an adjustab

A method and apparatus is provided for stress testing integrated circuits to determine their susceptibility to hot carrier charge injection damage. The system includes a hot carrier injection source formed on a semiconductor wafer carrying the ICs under test. The carrier source comprises an adjustable, voltage controlled oscillator having a variable frequency AC output test signal, and a modulator circuit for varying the duty cycle of the test signal applied to the ICs.

대표청구항 ▼

1. An on-wafer hot carrier test system for stress testing integrated circuits formed on said wafer, comprising:an adjustable oscillator circuit for producing an alternating current test signal having a variable frequency, said oscillator circuit having an input and having an output coupled with each

1. An on-wafer hot carrier test system for stress testing integrated circuits formed on said wafer, comprising:an adjustable oscillator circuit for producing an alternating current test signal having a variable frequency, said oscillator circuit having an input and having an output coupled with each of said integrated circuits; and,a modulator circuit coupled with said oscillator circuit for adjusting the duty cycle of said test signal, wherein said modulator circuit includes a first input coupled with an adjustable voltage source, and the length of said duty cycle is related to the magnitude of the a signal delivered to said first input from said voltage source, said modulator circuit includes at least one transistor controlled by a bias voltage determined by the magnitude of the signal delivered to said first input from said voltage source. 2. The test circuit of claim 1, wherein said input of said oscillator circuit is coupled with an adjustable voltage source, and the frequency of said test signal is related to the magnitude of a signal delivered to said input from said voltage source. 3. The system of claim 2, wherein said oscillator circuit includes at least one transistor controlled by a bias voltage determined by the magnitude of the signal delivered to said input from said voltage source. 4. The system of claim 3, wherein said oscillator circuit includes at least one inverter coupled between said transistor and said output for inverting the signal delivered to said output. 5. The system of claim 1, wherein:said oscillator circuit includes a feedback loop coupled between the input and output of said oscillator circuit, andsaid modulator circuit includes a second input coupled with said feedback loop. 6. A hot carrier test system formed on a semiconductor wafer for stress testing individual integrated circuits on said wafer, comprising:a variable frequency oscillator having an output for applying a test signal to an integrated circuit under test, said test signal having a changeable frequency, wherein said variable frequency oscillator includes an input for receiving a changeable voltage, the value of said voltage determining the frequency of said test signal; and,means coupled with said oscillator for adjusting a duty cycle of said test signal applied to said integrated circuit under test, wherein said duty cycle adjusting means includes a modulator circuit having an input connected with said oscillator output, and having an output, said modulator circuit includes a pair of transistors having their source-to-drain paths coupled in series, and controlled by the voltage of said test signal output by said oscillator. 7. The system of claim 6, wherein said variable frequency oscillator includes a plurality of series connected inverters arranged to form a ring oscillator. 8. The system of claim 7, wherein the number of said inverters is an odd number. 9. The system of claim 6, wherein said duty cycle adjusting means includes an input for receiving a second changeable voltage, the value of said second changeable voltage determining said duty cycle. 10. The system of claim 6, wherein said modulator circuit includes an odd number of inverters coupled in series with each other and with said output of said modulator circuit. 11. A method for stress testing integrated circuits formed on a semiconductor wafer using hot carrier injection, comprising the steps of:(A) producing an A.C. test signal using an oscillator formed on said wafer;(B) adjusting the frequency of said test signal, by changing the value of a supply voltage, and applying said voltage to an input of said oscillator circuit;(C) adjusting the duty cycle of said test signal, by changing the value of a second supply voltage, and applying said second voltage to an input of said modulator circuit; and,(D) applying said test signal to an integrated circuit on said wafer. 12. The method of claim 11, wherein set (A) is performed using a ring oscillator. 13. The method of c laim 11, wherein step (C) includes feeding the test signal output from said oscillator to an input of said modulator circuit.