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Heated filling device 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • B23K-037/00
  • B23K-031/02
  • B67D-005/00
출원번호 US-0026135 (2001-12-20)
발명자 / 주소
  • Pedigo, Jesse
  • Meyer, Timothy
출원인 / 주소
  • TTM Advanced Circuits, Inc.
대리인 / 주소
    Greenberg Traurig, LLP
인용정보 피인용 횟수 : 0  인용 특허 : 66

초록

A filling system includes a pressurized source of fill material and a pressure fill head wherein the fill head also includes a beating element positioned so as to transfer heat to fill material passing through the fill head. A method of filling holes using a fill material passing through a pressure

대표청구항

1. A heated filling system with reduced heat loss comprising:a pressurized source of fill material; and,a pressure fill head wherein the fill head also comprises heating element, adapted to transfer heat from a heated fluid flowing through the heating element to the fill material in the flow pathway

이 특허에 인용된 특허 (66)

  1. Swamy Deepak N. (Austin TX), Anisotropic interconnect methodology for cost effective manufacture of high density printed circuit boards.
  2. Choinski Edward J. (Wayland MA), Apparatus and method for temporarily sealing holes in printed circuit boards.
  3. Choinski Edward J. (Wayland MA), Apparatus and method for temporarily sealing holes in printed circuit boards utilizing a thermodeformable material.
  4. Kowtko Robert M. (Long Valley NJ) Mellwig Richard A. (Tatamy PA), Apparatus for injection of viscous material.
  5. Andris Gerald S. (Poughkeepsie NY) Gauci John P. (Putnam Valley NY), Apparatus for manufacture of multi-layer ceramic interconnect structures.
  6. Kawakami Shin (Saitama JPX) Haruyama Satoshi (Saitama JPX) Okonogi Hirotaka (Saitama JPX), Apparatus for packing filler into through-holes or the like in a printed circuit board.
  7. Higgins ; III Leo M. (Lakeville MA), Circuit board fabrication.
  8. Felten John James ; Padlewski Stephan, Composition and process for filling vias.
  9. Smith ; Brian Roger ; Jarvis ; Charles Richard ; Payne ; Stephen Marti n ; Potts ; Robert John ; Wallis ; Frank, Curved rigid printed circuit boards.
  10. Griffin David Peter,GBX, Filling containers with particulate material.
  11. Griffin David Peter,GBX, Filling containers with particulate material.
  12. Jesse L. Pedigo, Filling device.
  13. Chong Ku Ho (Arlington Heights IL) Crockett ; Jr. Charles Hayden (Austin TX) Dunn ; deceased Stephen Alan (late of Georgetown TX by Alice Catherine Dunn ; independent administratrix ) Hoebener Karl G, Fine dimension stacked vias for a multiple layer circuit board structure.
  14. Marshall, Stephen; An, Hung D., Flexible container filling apparatus.
  15. Johansson Gary Alan ; Papathomas Konstantinos I., Flowable compositions and use in filling vias and plated through-holes.
  16. Biunno Nicholas ; Bryan Scott ; Hu Mason, Forming plugs in vias of circuit board layers and subassemblies.
  17. Deur Ted E. (Hillsboro OR) Crawford Clark W. (Wilsonville OR) Wood Brian J. (Portland OR) Marantz Richard (Portland OR) Buehler James D. (Troutdale OR), Ink level sensing probe system for an ink jet printer.
  18. Andris Gerald S. (Poughkeepsie NY) Gauci John P. (Putnam Valley NY), Manufacture of a multi-layer interconnect structure.
  19. Bhatt Anilkumar Chinuprasad ; Glatzel Donald Herman ; Moring Allen F. ; Markovich Voya Rista ; Papathomas Kostas ; Russell David John, Manufacturing circuit board assemblies having filled vias.
  20. Ha Vinh Van ; Trublowski John ; Nation Brenda Joyce ; Lin Jeff ; Perng Chin-Yuan, Method and apparatus for dispensing viscous material.
  21. Schoenthaler David (Lower Makefield Township ; Bucks County PA) Wojcik Thaddeus (Hopewell Township ; Mercer County NJ), Method and apparatus for dispensing viscous materials.
  22. Lynch John F. (Half Moon Bay CA), Method and apparatus for filling high density vias.
  23. Bryan Scott K. ; Biunno Nicholas, Method and apparatus for forming plugs in vias of a circuit board layer.
  24. Mendez Patricio F. ; Brown Stuart B., Method and apparatus for metal solid freeform fabrication utilizing partially solidified metal slurry.
  25. Seibel Markus (Mainz DEX), Method and manufacture for electrically insulating base material used in plated-through printed circuit panels.
  26. Lan James J. D. ; Chiang Steve S. ; Shepherd William H. ; Wu Paul Y. F. ; Xie John Y., Method and structure to interconnect traces of two conductive layers in a printed circuit board.
  27. Litt David K. ; Hernandez Jorge M., Method for filling vias in ceramic substrates with composite metallic paste.
  28. Goldfarb Harold (Irvine CA), Method for packaging a board of electronic components.
  29. Choinski Edward J. (Wayland MA), Method for temporarily sealing holes in printed circuit boards utilizing a thermodeformable material.
  30. Kawakami Shin (Saitama JPX) Haruyama Satoshi (Saitama JPX) Okonogi Hirotaka (Saitama JPX), Method of filling conductive material into through holes of printed wiring board.
  31. St. John Frank ; Rodriguez Felix ; Christensen Susan, Method of forming plugs in vias of a circuit board by utilizing a porous membrane.
  32. Bhatt Ashwinkumar C. ; Kotylo Joseph A. ; Lyjak Kenneth S. ; Rai Amarjit S. ; Welsh John A., Method of making a printed circuit board having filled holes.
  33. Farquhar Donald S. ; Markovich Voya R. ; Papathomas Kostas I. ; Schmidt Leonard L., Method of making a printed circuit board having filled holes and fill member for use therewith.
  34. Nelson Gregory H. (Gilbert AZ) Lebow Sanford (Westlake Village CA) Nogavich Eugene (Gilbert AZ), Method of manufacture interconnect device.
  35. Kawabata Shoichi (Kyoto JPX) Sakai Norio (Kyoto JPX) Minowa Kenji (Kyoto JPX), Method of manufacturing ceramic multilayer electronic component.
  36. Hunt John F. (2420 E. Washington Ave. ; Apt. 5 Madison WI 53704), Methods and apparatus for making grids from fibers.
  37. Harvey Paul Marlan, Multi-layer circuit having a via matrix interlayer connection.
  38. Harvey Paul Marlan, Multi-layer circuit having a via matrix interlayer connection and method for fabricating the same.
  39. La Bate ; Jr. Frank J. (Lauderhill FL) De Santis John A. (North Lauderdale FL) Suppelsa ; Sr. Anthony B. (Coral Springs FL), Multilayer circuit substrate and method for forming same.
  40. Nelson Gregory H. (Gilbert AZ) Lockard Steven C. (Phoenix AZ), Multilayer interconnect device and method of manufacture thereof.
  41. Tsukada Yutaka (Shiga JPX) Tsuchida Shuhei (Kusatsu JPX), Multilayer printed circuit board and method for fabricating same.
  42. Mizumoto Shogo (Ohtsu JPX) Tsukada Yutaka (Shiga-Ken JPX), Multilayer printed wiring board and method of making same.
  43. Buechele Alvin Wilbur ; Butler John Thomas, Nozzle and method for extruding conductive paste into high aspect ratio openings.
  44. Tsukamoto Masahide,JPX, Printed circuit board and electronic components.
  45. Reed Ronald G. (Monument CO), Printed circuit board through hole technique.
  46. Takaaki Higashida JP; Hiroyuki Otani JP; Takahiko Iwaki JP, Printing method and printing apparatus.
  47. Bhatt Anilkumar Chinuprasad ; Glatzel Donald Herman ; Moring Allen F. ; Markovich Voya Rista ; Papathomas Kostas ; Russell David John, Process for manufacturing a circuit board with filled holes.
  48. Bhatt Anilkumar Chinuprasad ; Glatzel Donald Herman ; Moring Allen F. ; Markovich Voya Rista ; Papathomas Kostas ; Russell David John, Process for manufacturing a circuit with filled holes.
  49. Okada Keisuke (Tokyo JPX), Process for preparing multi-layer printed wiring board.
  50. Davignon John J. (Austin TX) Jermain Don J. (Georgetown TX) Connally Leslie O. (Albuquerque NM), Reduction of surface copper thickness on surface mount printed wire boards with copper plated through holes by the chemi.
  51. Baron Richard D. (Indian Rocks Beach FL), Rotary filling and capping apparatus.
  52. Watanabe Hiroyuki (Hadano JPX) Machita Tetsuji (Ibaraki JPX), Screen printing apparatus for filling through-holes in circuit board with paste.
  53. Higashida Takaaki,JPX ; Otani Hiroyuki,JPX ; Iwaki Takahiko,JPX, Screen printing method and printing apparatus.
  54. Gardner Mark I. ; Kadosh Daniel ; Hause Fred N., Semiconductor fabrication employing a spacer metallization technique.
  55. Hemsath Klaus H. (Toledo OH), Simplified, low cost absorption heat pump.
  56. Brilka Joachim C. (Hamburg DEX) Weltersbach Wolfgang (Hamburg DEX), Synchronous demodulator having automatically tuned band-pass filter.
  57. Schneider Mark, System for fabricating conductive epoxy grid array semiconductor packages.
  58. Pasch Nicholas F. (Pacifica CA) Patrick Roger (Santa Clara CA), Techniques for via formation and filling.
  59. Pasch Nicholas F. (Pacifica CA) Patrick Roger (Santa Clara CA), Techniques for via formation and filling.
  60. Xu Zheng (Foster City CA) Chen Fusen (Cupertino CA), Ultrasonic wave assisted contact hole filling.
  61. Xu Zheng ; Chen Fusen, Ultrasonic wave assisted contact hole filling.
  62. Andreades Sam (Red Bank NJ) Beske Grant A. (Princeton Junction NJ) Lott John W. (Tinton Falls NJ), Use of photosensitive stratum to create through-hole connections in circuit boards.
  63. Andreades Sam (Red Bank NJ) Beske Grant A. (Princeton Junction NJ) Lott John W. (Tinton Falls NJ), Use of photosensitive stratum to create through-hole connections in circuit boards.
  64. Kawaguchi Toshiyasu,JPX ; Obayashi Koji,JPX ; Okada Misao,JPX ; Takei Yusuke,JPX, Vacuum degassing method for molten glass flow.
  65. Kulesza Joseph Duane ; Markovich Voya Rista ; Papathomas Kostas ; Sabia Joseph Gene, Via fill compositions for direct attach of devices and method for applying same.
  66. Arldt Roy Lynn ; Boyko Christina Marie ; Cayson Burtran Joe ; Kozlowski Richard Michael ; Kulesza Joseph Duane ; Lauffer John Matthew ; Liu Philip Chihchau ; Markovich Voya Rista ; Mahmoud Issa Said , Via fill compositions for direct attach of devices and methods for applying same.
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