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[미국특허] Wiring board provided with passive element and cone shaped bumps 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H05K-001/03
  • H05K-007/12
출원번호 US-0160179 (2002-06-04)
우선권정보 JP-0170020 (2001-06-05); JP-0170019 (2001-06-05)
발명자 / 주소
  • Fukuoka, Yoshitaka
  • Serizawa, Tooru
  • Yagi, Hiroshi
  • Shimada, Osamu
  • Hirai, Hiroyuki
  • Yamaguchi, Yuji
출원인 / 주소
  • Dai Nippon Printing Co., Ltd.
  • D.T. Circuit Technology Co., Ltd.
대리인 / 주소
    Finnegan, Henderson, Farabow, Garrett &
인용정보 피인용 횟수 : 30  인용 특허 : 16

초록

A fabricating method of a wiring board provided with passive elements is disclosed. The fabricating method includes coating one or both of resistive paste and dielectric paste on at least any one of first surfaces of a first metal foil and a second metal foil each of which has a first surface and a

대표청구항

1. A wiring board comprising:an insulating board having a first surface and a second surface; a stratified resistive element and/or stratified dielectrics embedded in the insulating board so as to appear in the first surface and/or the second surface of the insulating board; a first wiring layer and

이 특허에 인용된 특허 (16) 인용/피인용 타임라인 분석

  1. Tserng Hua Quen ; Saunier Paul ; Sanzgiri Shashikant M., Antenna having elements with improved thermal impedance.
  2. Nomura Kazuo,JPX ; Nakanuma Nobutsugu,JPX ; Ishiyama Ichiro,JPX ; Higashi Koji,JPX ; Kato Masaki,JPX ; Nagare Ichiro,JPX ; Kurokawa Hiroyuki,JPX ; Ohara Yozo,JPX, Capacitor-mounted circuit board.
  3. Dunn Gregory J. ; Lach Larry ; Savic Jovica ; Beuhler Allyson ; Simons Everett, Circuit board features with reduced parasitic capacitance and method therefor.
  4. Odaira Hiroshi (Chigasaki JPX) Imamura Eiji (Yokosuka JPX) Wada Yusuke (Tokyo JPX) Arai Yasushi (Fujisawa JPX) Sasaoka Kenji (Zama JPX) Mori Takahiro (Yokohama JPX) Ikegaya Fumitoshi (Zama JPX) Kowat, Circuit devices and fabrication method of the same.
  5. Hayama Masaaki,JPX ; Mohri Noboru,JPX ; Nakao Keiichi,JPX, Electronic part fabricated by intaglio printing.
  6. Tserng Hua Q. (Dallas TX) Saunier Paul (Garland TX), Integrated circuit with improved thermal impedance.
  7. Pfeifer Michael J. (Chandler AZ) Marlin George W. (Phoenix AZ), Method of fabricating a flip chip semiconductor device having an inductor.
  8. Bowles, Philip Harbaugh; Mobley, Washington Morris; Parker, Richard Dixon; Ellis, Marion Edmond, Method of forming integral passive electrical components on organic circuit board substrates.
  9. Klaser John J. (Springfield MO), Method of making a multilayer printed circuit board having screened-on resistors.
  10. Felten John James, Method to embed passive components.
  11. Orihara Katsuhisa,JPX ; Fujimoto Masahiro,JPX ; Monkawa Haruo,JPX ; Kurita Hideyuki,JPX, Non-contact IC card and process for its production.
  12. Masatoshi Akagawa JP, Non-contact type IC card and process for manufacturing same.
  13. Henderson James M. (Scottsdale AZ) Gibbs Terry L. (Tempe AZ), Printed circuit resistive element.
  14. Kakuhashi Takeshi (Ibaraki JPX) Miyake Yasufumi (Ibaraki JPX), Printed circuit substrate with resistance elements.
  15. Yamamoto Yuichi,JPX ; Sato Yoshizumi,JPX ; Motomura Tomohisa,JPX ; Hamano Hiroshi,JPX ; Arai Yasushi,JPX, Printed wiring board having an interconnection penetrating an insulating layer.
  16. Yamaguchi, Yoshihide; Terabayashi, Takao; Tenmei, Hiroyuki; Hozoji, Hiroshi; Kanda, Naoya, Semiconductor module and method of making the device.

이 특허를 인용한 특허 (30) 인용/피인용 타임라인 분석

  1. Borland, William J.; Cox, G. Sidney; McGregor, David Ross, Capacitive/resistive devices, organic dielectric laminates and printed wiring boards incorporating such devices, and methods of making thereof.
  2. Borland,William J.; Cox,G. Sidney; McGregor,David Ross, Capacitive/resistive devices, organic dielectric laminates and printed wiring boards incorporating such devices, and methods of making thereof.
  3. Suehiro,Mitsuo, Circuit board, device mounting structure, device mounting method, and electronic apparatus.
  4. Iijima,Tomoo; Endo,Kimitaka, Connecting member between wiring films, manufacturing method thereof, and manufacturing method of multilayer wiring substrate.
  5. Horiba,Keiji, Connector housing with internal capacitor constructed with overlapping portions of terminals.
  6. Kuramochi, Satoru; Fukuoka, Yoshitaka, Electronic device and production method thereof.
  7. Kuramochi, Satoru; Fukuoka, Yoshitaka, Electronic device and production method thereof.
  8. Gotoh,Masashi; Kawasaki,Kaoru; Nakano,Mutsuko; Yamamoto,Hiroshi, Electronic part manufacturing method and electronic part.
  9. Lee, Chun-Che; Su, Yuan-Chang; Lee, Ming Chiang; Huang, Shih-Fu, Embedded component device and manufacturing methods thereof.
  10. Su, Yuan-Chang; Huang, Shih-Fu; Lee, Ming-Chiang; Wang, Chien-Hao, Embedded component substrate and manufacturing methods thereof.
  11. Takahashi, Michimasa; Mikado, Yukinobu; Yanagisawa, Hiroyuki, Manufacturing method for a printed wiring board.
  12. Fukuoka,Yoshitaka; Serizawa,Tooru; Yagi,Hiroshi; Shimada,Osamu; Hirai,Hiroyuki; Yamaguchi,Yuji, Method for fabricating wiring board provided with passive element.
  13. Fukuoka, Yoshitaka; Serizawa, Tooru; Yagi, Hiroshi; Shimada, Osamu; Hirai, Hiroyuki; Yamaguchi, Yuji, Method for fabricating wiring board provided with passive element, and wiring board provided with passive element.
  14. Sekimoto, Yasuyuki, Method for manufacturing substrate.
  15. Park, Hwa Sun; Kim, Tae Eui, Method of manufacturing printed circuit board having embedded resistors.
  16. Borland,William J.; Ferguson,Saul; Pyada,Hena, Methods of forming printed circuit boards having embedded thick film capacitors.
  17. McKinstry, Susan Trolier; Randall, Clive A.; Nagata, Hajime; Pinceloup, Pascal G.; Baeson, James J.; Skamser, Daniel J.; Randall, Michael S.; Tajuddin, Azizuddin, Microcontact printed thin film capacitors.
  18. McKinstry, Susan Trolier; Randall, Clive A.; Nagata, Hajime; Pinceloup, Pascal I.; Beeson, James J.; Skamser, Daniel J.; Randall, Michael S.; Tajuddin, Azizuddin, Microcontact printed thin film capacitors.
  19. Tada,Kazuo; Kondo,Koji; Takeuchi,Satoshi, Multi-layer printed circuit board and method for manufacturing the same.
  20. Oikawa, Akira, Multilayer circuit board with resin bases and separators.
  21. Oh, Yoong; Ryu, Chang-Sup; Park, Dong-Jin; Mok, Jee-Soo; Seo, Byung-Bae, Multilayer printed circuit board using paste bumps.
  22. Hong, Seog-woo; Song, In-sang; Ha, Byeong-ju; Park, Hae-seok; Hwang, Jun-sik; Lee, Joo-ho, RF module with multi-stack structure.
  23. Essig, Kay Stephan; Appelt, Bernd Karl; Lee, Ming Chiang, Semiconductor package with embedded die and manufacturing methods thereof.
  24. Su, Yuan-Chang; Huang, Shih-Fu; Chen, Chia-Cheng; Chen, Tzu-Hui; Chen, Kuang-Hsiung; Hsieh, Pao-Ming; Lee, Ming Chiang; Appelt, Bernd Karl, Semiconductor package with single sided substrate design and manufacturing methods thereof.
  25. Su, Yuan-Chang; Huang, Shih-Fu; Chen, Chia-Cheng; Chen, Tzu-Hui; Chen, Kuang-Hsiung; Hsieh, Pao-Ming; Lee, Ming Chiang; Appelt, Bernd Karl, Semiconductor package with single sided substrate design and manufacturing methods thereof.
  26. Su, Yuan-Chang; Huang, Shih-Fu; Chen, Chia-Cheng; Chen, Tzu-Hui; Chen, Kuang-Hsiung; Hsieh, Pao-Ming; Lee, Ming Chiang; Appelt, Bernd Karl, Semiconductor package with single sided substrate design and manufacturing methods thereof.
  27. Yamamoto, Kenichi; Komyoji, Daido; Kuramasu, Keizaburo, Sheet-like composite electronic component and method for manufacturing same.
  28. Chen, Chia-Ching; Ding, Yi-Chuan, Stackable semiconductor package and manufacturing method thereof.
  29. Ogino,Masahiko; Satoh,Toshiya; Miwa,Takao; Nabatame,Toshihide; Amou,Satoru, Thin film capacitor and electronic circuit component.
  30. Baba,Daizou; Fukuya,Naohito; Hirabayashi,Tatsuo, Wiring board sheet and its manufacturing method, multilayer board and its manufacturing method.

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