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Specifying timing and triggering functionality in a graphical program using graphical program nodes 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-003/00
  • G66F-019/00
출원번호 US-0179149 (2002-06-24)
발명자 / 주소
  • Makowski, Thomas A.
  • Vaidya, Rajesh
  • Johnson, Brian
출원인 / 주소
  • National Instruments Corporation
대리인 / 주소
    Meyertons Hood Kivlin Kowert &
인용정보 피인용 횟수 : 28  인용 특허 : 13

초록

System and method for specifying timing or triggering (TT) in a graphical program (GP). A first polymorphic timing or triggering node (PTTN) is displayed in the GP in response to user input. TT type options for the PTTN are presented in response to user input. User input specifying one of the TT typ

대표청구항

1. A computer-implemented method for specifying timing in a graphical program, wherein the method for specifying timing operates in a computer including a memory, a display and a user input device, the method comprising:displaying on the display a first timing node in the graphical program; displayi

이 특허에 인용된 특허 (13)

  1. Sawahata Tomoharu,JPX ; Tsai Wei-Tek ; Onoma Akira K.,JPX ; Jiang Tao, Apparatus for visual programming with screen flow.
  2. Wells Robert Edward ; Karnofsky Kenneth F. ; Green Robert William ; Dolce Anne Marie ; Ramos Ernesto ; Havusha Sasson, Computer interface system for automatically generating graphical representations of computer operations linked together according to functional relationships.
  3. Joseph Eugene R. (Montreal OR CAX) Trachtman Michael (Eugene OR), Computer modelling system and method for specifying the behavior of graphical operator interfaces.
  4. Kodosky Jeffrey L. ; Shah Darshan K., Method and apparatus for providing stricter data type capabilities in a graphical data flow diagram.
  5. Southworth, Robert A.; Volz, Kenneth C.; Morris, Jr., Robert C.; Carroll, Dan S., Method for programming timer to execute timing operations.
  6. Milne Steve H. (Palo Alto CA) Tindell James Michael (La Honda CA), Multimedia control system.
  7. Kodosky Jeffrey L. (Austin TX) Truchard James J. (Austin TX) MacCrisken John E. (Palo Alto CA), Polymorphic dataflow block diagram system and method for programming a computer.
  8. Richards Richard Steele, Polymorphic enhanced modeling.
  9. Nixon Mark ; Jundt Larry O. ; Havekost Robert B. ; Ottenbacher Ron, Process control system for monitoring and displaying diagnostic information of multiple distributed devices.
  10. Wilson Gregory S. (Merrimack County NH) Halpert David E. (Windsor County VT) Chaffee Mark A. (Grafton County NH), Programmable motion controller with graphical programming aid.
  11. Omid Sojoodi ; Robert Dye ; Murali Parthasarathy ; Ram Kudukoli, System and method for accessing object capabilities in a graphical program.
  12. Williams David Mark, System and methods for visual programming based on a high-level hierarchical data flow model.
  13. Eiji Ohara JP; Midori Suzuki JP; Shozo Kondo JP; Nobuhiro Suetsugu JP; Akio Hagino JP, Visual programming method and its system.

이 특허를 인용한 특허 (28)

  1. Walpole,Shawn D., Aggregate handling of operator overloading.
  2. Macklem, Grant V.; Wenzel, Lothar; Gosalia, Rishi H.; Juhasz, James T.; Dunia, Ricardo, Automatic conversion of a textual language into a graphical program representation.
  3. Peck, Joseph E.; Novacek, Matthew E., Automatic generation of application domain specific graphical programs.
  4. Peck, Joseph E.; Novacek, Matthew E., Automatic generation of application domain specific graphical programs.
  5. Correll, Jeffrey N.; Fuller, III, David W.; Hayles, Timothy J.; Breyer, John R.; Kornerup, Jacob, Automatically determining data transfer functionality for wires in a graphical diagram.
  6. Hudson, III, Duncan G., Automatically generating a graphical program with a plurality of models of computation.
  7. Hayles,Timothy J.; Squibb,Christopher J., Automatically synchronizing timed circuits on I/O Devices.
  8. Hudson, III, Duncan G.; Gosalia, Rishi H., Compiling a graphical program having a textual language program portion for a real time target.
  9. Chandhoke, Sundeep, Configuring buffers with timing information.
  10. Hayles, Timothy J.; Kornerup, Jacob, Configuring icons to represent data transfer functionality.
  11. Hudson, III, Duncan G.; Gosalia, Rishi H.; Morrow, Gregory O.; Andrade, Hugo A.; Petersen, Newton G.; Peck, Joseph E.; Novacek, Matthew E.; Butler, Cary Paul; Odom, Brian Keith, Debugging a graphical program deployed on a programmable hardware element.
  12. Gilboa,Yuval, Declarative specification of model visualizations.
  13. Kodosky, Jeffrey L.; Correll, Jeffrey N.; Fuller, III, David W; Hayles, Timothy J.; Breyer, John R.; Kornerup, Jacob, Diagram with configurable wires.
  14. Hudson, III, Duncan G.; Gosalia, Rishi H., Generating a hardware description for a programmable hardware element based on a graphical program including multiple models of computation.
  15. Hudson, III, Duncan G.; Gosalia, Rishi H.; Morrow, Gregory O.; Andrade, Hugo A.; Petersen, Newton G.; Peck, Joseph E.; Novacek, Matthew E.; Butler, Cary Paul; Odom, Brian Keith, Generating a hardware description for a programmable hardware element based on a graphical program including multiple models of computation.
  16. Hudson, III, Duncan G.; Gosalia, Rishi H.; Morrow, Gregory O.; Andrade, Hugo A.; Petersen, Newton G.; Peck, Joseph E.; Novacek, Matthew E.; Butler, Cary Paul; Odom, Brian Keith, Generating a hardware description for a programmable hardware element based on a graphical program including multiple physical domains.
  17. Purcell,Christopher John; Berry,Robert Francis, Generating a model of software in execution.
  18. Correll, Jeffrey N.; Fuller, III, David W; Hayles, Timothy J.; Breyer, John R.; Kornerup, Jacob, Graphical diagram which automatically determines a data transport mechanism for wires based on configured policies.
  19. Kodosky, Jeffrey L.; Fuller, III, David W; Correll, Jeffrey N.; Hayles, Timothy J.; Breyer, John R.; Kornerup, Jacob, Graphical diagram wires whose appearance represents configured semantics.
  20. Hayles, Timothy J., Graphical programming methods for generation, control and routing of digital pulses.
  21. Kornerup, Jacob; Kodosky, Jeffrey L.; Andrade, Hugo A.; Shah, Biren; Vrancic, Aljosa; Santori, Michael L., Graphically representing timing in a graphical program.
  22. Hayles,Timothy J., Parameter oriented graphical representation of hardware timing and triggering capabilities with contextual information.
  23. Fisher,Ken Scott; Baxter,Kevin Cotton, Portable memory drive with portable applications and cross-computer system management application.
  24. Szpak, Peter S.; Englehart, Matthew J., System and method for scheduling the execution of model components using model events.
  25. Szpak, Peter; Englehart, Matthew, System and method for scheduling the execution of model components using model events.
  26. Kornerup, Jacob; Shah, Biren; Vrancic, Aljosa; Curtis, Matthew; Rogers, Steve, Timed loop with sequence frames structure for a graphical program.
  27. Kornerup, Jacob; Shah, Biren; Vrancic, Aljosa, Timed sequence for a graphical program.
  28. Kornerup, Jacob; Kodosky, Jeffrey L.; Andrade, Hugo A.; Shah, Biren; Vrancic, Aljosa; Santori, Michael L., Timing wires in a graphical program.
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