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A semiconductor component includes a semiconductor die, a low k polymer layer on the die and redistribution conductors on the polymer layer. The component also includes bonding pads on the conductors with a metal stack construction that includes a conductive layer, a barrier/adhesion layer and a non

A semiconductor component includes a semiconductor die, a low k polymer layer on the die and redistribution conductors on the polymer layer. The component also includes bonding pads on the conductors with a metal stack construction that includes a conductive layer, a barrier/adhesion layer and a non-oxidizing layer. The bonding pads facilitate wire bonding to the component and the formation of reliable wire bonds on the component. A method for fabricating the component includes the steps of forming the conductors and bonding pads using electroless deposition. The component can be used to fabricate electronic assemblies such as modules, packages and printed circuit boards.

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1. A method for fabricating a semiconductor component comprising:providing a semiconductor die comprising a die contact and at least one integrated circuit in electrical communication with the die contact; forming a polymer layer on the die; forming a redistribution conductor on the polymer layer in

1. A method for fabricating a semiconductor component comprising:providing a semiconductor die comprising a die contact and at least one integrated circuit in electrical communication with the die contact; forming a polymer layer on the die; forming a redistribution conductor on the polymer layer in electrical communication with the die contact; forming a wire bonding pad on the conductor; forming a first metal layer on the conductor and the wire bonding pad; and forming a non-oxidizing metal layer on the first metal layer covering the first metal layer and edges thereof configured to seal and protect the conductor and the wire bonding pad and to provide a wire bondable surface. 2. The method of claim 1 wherein the non-oxidizing metal layer comprises a metal selected from the group consisting of Au, Pt and Pd.3. The method of claim 1 wherein the first metal layer comprises a metal selected from the group consisting of Ni, V, Cr, CrCu and Cu.4. The method of claim 1 wherein the forming the first metal layer step and the forming the non-oxidizing metal layer step comprise electroless deposition.5. The method of claim 1 further comprising forming a stud bump on the wire bonding pad.6. The method of claim 1 further comprising wire bonding a wire to the wire bonding pad.7. The method of claim 1 further comprising forming a second polymer layer on the die and the conductor having an opening aligned with the wire bonding pad.8. A method for fabricating a semiconductor component comprising:providing a die comprising a plurality of integrated circuits, a circuit side, and a plurality of die contacts on the circuit side in electrical communication with the integrated circuits having a first pattern; forming a polymer layer on the circuit side; forming a plurality of conductors on the polymer layer in electrical communication with the die contacts; forming a plurality of wire bonding pads on the polymer layer in electrical communication with the conductors and having a second pattern; forming a plurality of barrier/adhesion layers on the conductors and the wire bonding pads; and forming a plurality of non-oxidizing layers on the barrier/adhesion layers and edges thereof configured to seal and protect the conductors and the wire bonding pads and to provide wire bondable surfaces. 9. The method of claim 8 wherein the forming the conductors step and the forming the wire bonding pads step comprise electrolessly depositing a first metal.10. The method of claim 8 wherein the forming the barrier/adhesion layers step comprises electrolessly depositing a second metal.11. The method of claim 8 wherein the forming the non-oxidizing layers step comprises electrolessly depositing a third metal.12. The method of claim 8 wherein the polymer layer comprises a material selected from the group consisting of polyimide, PBO and BCB.13. The method of claim 8 wherein the barrier/adhesion layers comprises a metal selected from the group consisting of V, Cr, CrCu and Cu.14. A method for fabricating a semiconductor component comprising:providing a substrate comprising a semiconductor die comprising a plurality of integrated circuits and a plurality of die contacts in electrical communication with the integrated circuits; forming a plurality of metal bumps on the die contacts; forming a polymer layer on the die; planarizing the polymer layer and the metal bumps to a same surface; forming a plurality of conductors on the polymer layer in electrical communication with the metal bumps, the conductors comprising a plurality of wire bonding pads having a different pattern than the die contacts; forming barrier/adhesion layers on the conductors and the wire bonding pads; forming non-oxidizing layers on the barrier/adhesion layers and edges thereof configured to seal the conductors and the wire bonding pads and to provide wire bondable surfaces; and singulating the die from the substrate. 15. The method of claim 14 further comprising forming a plurality of stud bumps on the wire bonding pads.16. The method of claim 14 further comprising forming a plurality of wire bonds on the wire bonding pads.17. The method of claim 14 further comprising forming a second polymer layer on the die having openings aligned with the wire bonding pads.18. The method of claim 14 wherein the substrate comprises a semiconductor wafer.19. The method of claim 14 wherein the forming the barrier/adhesion layer step comprises electrolessly depositing Ni.20. The method of claim 14 wherein the forming the non-oxidizing layer step comprises electrolessly depositing Au.21. A method for fabricating a semiconductor component comprising:providing a semiconductor die including a circuit side, a plurality of integrated circuits, and a plurality of die contacts on the circuit side in electrical communication with the integrated circuits having a first pattern; forming a polymer layer on the circuit side; forming a plurality of conductors on the polymer layer in electrical communication with the die contacts; forming a plurality of wire bonding pads on the conductors having a second pattern; forming a plurality of barrier/adhesion layers on the conductors and the wire bonding pads; and forming a plurality of non-oxidizing layers covering the barrier/adhesion layers and edges thereof configured to provide wire bondable surfaces. 22. The method of claim 21 further comprising adjusting electrical characteristics of the conductors by controlling a thickness of the barrier/adhesion layers.23. The method of claim 21 further comprising forming a second polymer layer on the circuit side encapsulating the conductors and having a plurality of openings aligned with the wire bonding pads.24. The method of claim 21 wherein the non-oxidizing layers completely seal the conductors and the wire bonding pads.25. The method of claim 21 further comprising forming a plurality of stud bumps on the wire bonding pads.26. The method of claim 25 further comprising wire bonding to the stud bumps.27. The method of claim 21 further comprising wire bonding to the wire bonding pads.