[특허]Method and apparatus for thermal management of integrated circuits

[미국특허] Method and apparatus for thermal management of integrated circuits 원문보기

IPC분류정보
국가/구분	United States(US) Patent 등록
국제특허분류(IPC7판)	H01L-021/44 H01L-023/34 H01L-035/04
출원번호	US-0122613 (2002-04-11)
발명자 / 주소	Cordes, Michael James Cordes, Steven Alan Ghoshal, Uttam Shyamalindu Robinson, Errol Wayne Speidell, James Louis
출원인 / 주소	International Business Machines Corporation
인용정보	피인용 횟수 : 21 인용 특허 : 13

초록 ▼

Method and apparatus for thermal management of an integrated circuit. A semiconductor device includes an integrated circuit and an integrated thermoelectric cooler formed on a common substrate. A semiconductor device is fabricated by forming an integrated circuit on a front side of the substrate and forming an integrated thermoelectric cooler on a back side of the substrate. A first thermal sink of semiconductor material capable of absorbing heat from the integrated circuit is formed on the back side of the substrate. N-type thermoelectric elements are formed on contacts formed on the first thermal sink. P-type thermoelectric elements are formed on contacts formed on a second thermal sink of semiconductor material capable of dissipating heat. The p-type and n-type thermoelectric elements are bonded to the contacts on the first and second thermal sinks, respectively, by a flip-chip soldering process. Using this method, semiconductor devices including an integrated circuit and integrated modules of thermoelectric elements are formed having cooling capacities corresponding to heat dissipated from different portions of the integrated circuit. As a result, substantially uniform temperature distribution across the integrated circuit can be achieved.

대표청구항 ▼

1. A method of fabricating a semiconductor device comprising:forming an integrated circuit on a front side of a substrate; and forming an integrated thermoelectric cooler capable of cooling the integrated circuit on a back side of the substrate. 2. The method, as claimed in claim 1, wherein forming the first thermal sink includes forming one or more diodes in the plurality of doped regions.3. The method, as claimed in claim 1, wherein forming the integrated thermoelectric cooler further includes forming a second thermal sink of semiconductor material capable of dissipating thermal energy.4. The method, as claimed in claim 3, wherein forming the second thermal sink includes forming a plurality of doped regions of semiconductor material.5. The method, as claimed in claim 4, wherein forming the second thermal sink includes forming one or more diodes in the plurality of doped regions.6. The method, as claimed in claim 3, wherein forming the integrated thermoelectric cooler further includes forming one or more contacts on the second thermal sink and forming one or more thermoelectric elements of a second type on the contacts formed on the second thermal sink.7. The method, as claimed in claim 6, further including assembling the semiconductor device by soldering the second thermal sink to the first thermal sink.8. The method, as claimed in claim 7, wherein soldering the second thermal sink to the first thermal sink includes:forming a layer of platinum on the one or more thermoelectric elements of the first and second types; depositing solder on the layer of platinum on the one or more thermoelectric elements of the first and second types; and soldering the layer of platinum on one or more thermoelectric elements of the first type to the one or more contacts formed on the second thermal sink and by soldering the layer of platinum on the one or more thermoelectric elements of the second type to the one or more contacts formed on the first thermal sink. 9. The method, as claimed in claim 6, wherein forming the one or more thermoelectric elements of the first and second types includes forming a first module of thermoelectric elements of the first and second types capable of cooling a first portion of the integrated circuit and at least a second module of thermoelectric elements of the first and second types capable of cooling a second portion of the integrated circuit.10. The method, as claimed in claim 9, wherein the first module of thermoelectric elements has a first cooling capacity corresponding to thermal energy dissipated from the first portion of the integrated circuit and the second module of thermoelectric elements has a second cooling capacity corresponding to thermal energy dissipated from the second portion of the integrated circuit.11. The method, as claimed in claim 9, wherein the first module of thermoelectric elements is associated with first bias currents corresponding to a first cooling capacity and the second module of thermoelectric elements is associated with second bias currents corresponding to a second cooling capacity.12. The method, as claimed in claim 1, wherein said semiconductor device is associated with a information handling system.

이 특허에 인용된 특허 (13) 인용/피인용 타임라인 분석

Hazen William A. (Hopkinton MA), Apparatus for cooling circuits.
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Vandersande Ian W. ; Ewell Richard ; Fleurial Jean-Pierre ; Lyon Hylan B., Cooling device featuring thermoelectric and diamond materials for temperature control of heat-dissipating devices.
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Shiomi Hiromu,JPX ; Nakahata Hideaki,JPX ; Nishibayashi Yoshiki,JPX ; Shikata Shin-ichi,JPX, Diamond heat sink including microchannel therein and methods for manufacturing diamond heat sinks.
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Ghoshal Uttam Shyamalindu, Electrically-isolated ultra-thin substrates for thermoelectric coolers.
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Shiu Shou-Yi,TWX ; Fang Yu-Ping,TWX ; Lui Hon-Hung,TWX, Integrated thermoelectric cooler formed on the backside of a substrate.
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Farnworth Warren M. (Nampa ID), Process for manufacturing semiconductor device structures cooled by Peltier junctions and electrical interconnect assemb.
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Iwamoto Koji (Kanagawa JPX), Structure of semiconductor laser package.
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Burward-Hoy Trevor (Cupertino CA), Sub-ambient temperature electronic package.
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Iwata Yuji,JPX ; Sasa Noriyasu,JPX, Thermoelectric cooling module and method for manufacturing the same.
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Ghoshal Uttam Shyamalindu, Thermoelectric cooling with dynamic switching to isolate heat transport mechanisms.
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Ghoshal Uttam Shyamalindu, Thermoelectric cooling with plural dynamic switching to isolate heat transport mechanisms.
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Johnson Gregory M. ; Casey Jon A. ; Dwyer Scott R. ; Long David C. ; Prettyman Kevin M., Thermoelectric devices and methods for making the same.
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Ghoshal Uttam Shyamalindu, Two dimensional thermoelectric cooler configuration.
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이 특허를 인용한 특허 (21) 인용/피인용 타임라인 분석

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Mowry, Anthony C.; Farber, David G.; Austin, Michael J.; Moore, John E., Heat management using power management information.
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Mowry, Anthony C.; Farber, David G.; Austin, Michael J.; Moore, John E., Heat management using power management information.
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Leech,Phillip A.; Frame,Kenneth B.; Alzien,Khaldoun, Heat sink detection.
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Leech, Phillip A.; Alzien, Khaldoun; Jacobs, William R., Heat sink verification.
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Phan, Khoi A.; Rangarajan, Bharath; Singh, Bhanwar, Mitigating heat in an integrated circuit.
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Janak, Christopher; Capezza, Steve; Jaggers, Christopher M; McAfee, David A; Merrikh, Ali Akbar; Grossman, Matthew; Poteracki, Nicholas; West, Jefferson; Hughes, Paul, Multi-compartment computing device with shared cooling device.
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Pham,Hung M.; Warner,Wayne R., Refrigeration system including thermoelectric module.
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Pham,Hung M; Warner,Wayne R, Refrigeration system including thermoelectric module.
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Pham,Hung M; Warner,Wayne R, Refrigeration system including thermoelectric module.
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Griebenow, Uwe; Hoentschel, Jan; Scheiper, Thilo; Beyer, Sven, Semiconductor device comprising a stacked die configuration including an integrated Peltier element.
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Griebenow, Uwe; Hoentschel, Jan; Scheiper, Thilo; Beyer, Sven, Semiconductor device comprising a stacked die configuration including an integrated peltier element.
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Nakazato, Norio; Sudo, Kimihiko, Semiconductor light source device.
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Akei, Masao; Ignatiev, Kirill M; Jayanth, Nagaraj; Pham, Hung M; Caillat, Jean-Luc M, Vapor compression circuit and method including a thermoelectric device.
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Akei, Masao; Ignatiev, Kirill; Jayanth, Nagaraj; Pham, Hung M.; Caillat, Jean-Luc M., Vapor compression circuit and method including a thermoelectric device.
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[미국특허] Method and apparatus for thermal management of integrated circuits 원문보기