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To provide a semiconductor device that can effectively suppress the short channel effect without deterioration of carrier migration, an impurity ion is added from a direction of the <110> axis with respect to a silicon substrate on forming a punch through stopper under the gate electrode. In t

To provide a semiconductor device that can effectively suppress the short channel effect without deterioration of carrier migration, an impurity ion is added from a direction of the <110> axis with respect to a silicon substrate on forming a punch through stopper under the gate electrode. In this invention, because the addition of the impurity is conducted by utilizing the principal of channeling, the impurity can be added a small amount of scattering suppressing damages on the surface of the silicon substrate. A channel forming region having an extremely small impurity concentration and substantially no crystallinity disorder is formed.

대표청구항 ▼

1. A semiconductor device comprising a plurality of MOSFETs formed in a single crystal semiconductor substrate,each of the plurality of MOSFETs comprising: a source region and a drain region each including a first impurity; a channel forming region being formed between the source region and the drai

1. A semiconductor device comprising a plurality of MOSFETs formed in a single crystal semiconductor substrate,each of the plurality of MOSFETs comprising: a source region and a drain region each including a first impurity; a channel forming region being formed between the source region and the drain region; and an impurity region including a second impurity having an opposite conductive type to the first impurity and being formed under the channel forming region and in the source region, wherein the impurity region is formed at a depth in a range of 20 to 150 nm from a surface of the single crystal semiconductor substrate, wherein the impurity region is not in contact with the drain region, and wherein a concentration of the second impurity in the channel forming region is from {fraction (1/100)} to {fraction (1/10)} of that in the impurity region formed under the channel forming region and in the source region. 2. A device according to claim 1, wherein the semiconductor device is an integrated circuit (IC).3. A device according to claim 1, wherein the semiconductor device is a microprocessor.4. A device according to claim 3, wherein the microprocessor is at least one selected from the group consisting of a RISC processor and an ASIC processor.5. A device according to claim 1, wherein the semiconductor device is at least one selected from the group consisting of a cellular phone, a personal handy phone system, and a portable computer.6. A device according to claim 1, wherein the single crystal semiconductor substrate is a single silicon substrate.7. A semiconductor device comprising a plurality of MOSFETs formed in a single crystal semiconductor substrate,each of the plurality of MOSFETs comprising: a source region and a drain region each including a first impurity; a channel forming region being formed between the source region and the drain region; an impurity region including a second impurity having an opposite conductive type to the first impurity and being formed under the channel forming region and in the source region; a pair of LDD regions, wherein one of the pair of LDD regions is formed between the source region and the channel forming region while the other of the pair of LDD regions is formed between the channel forming region and the drain region, wherein the impurity region is formed at a depth in a range of 20 to 150 nm from a surface of the single crystal semiconductor substrate, wherein the impurity region is not in contact with the drain region, and wherein a concentration of the second impurity in the channel forming region is from {fraction (1/100)} to {fraction (1/10)} of that in the impurity region formed under the channel forming region and in the source region. 8. A device according to claim 7, wherein the semiconductor device is an integrated circuit (IC).9. A device according to claim 7, wherein the semiconductor device is a microprocessor.10. A device according to claim 9, wherein the microprocessor is at least one selected from the group consisting of a RISC processor and an ASIC processor.11. A device according to claim 7, wherein the semiconductor device is at least one selected from the group consisting of a cellular phone, a personal handy phone system, and a portable computer.12. A semiconductor device comprising at least a CMOS circuit including an n-channel MOSFET and a p-channel MOSFET each being formed in a single crystal semiconductor substrate,said n-channel MOSFET comprising: a first source region and a first drain region each comprising a first n-type impurity; a first channel forming region being formed between the first source region and the first drain region; a first impurity region including a first p-type impurity and being formed under the first channel forming region and in the first source region; wherein the first impurity region is not in contact with the first drain region, said p-channel MOSFET comprising: a second source region and a second drain region each comprising a second p-type impurity; a second channel forming region being formed between the second source region and the second drain region; a second impurity region including a second n-type impurity and being formed under the second channel forming region; wherein each of the first and second impurity regions is formed at a depth in a range of 20 to 150 nm from a surface of the single crystal semiconductor substrate. 13. A device according to claim 12,wherein the first n-type impurity is arsenic, wherein the second n-type impurity is phosphorus, wherein each of the first and second p-type impurity is boron. 14. A device according to claim 12, wherein the semiconductor device is an integrated circuit (IC).15. A device according to claim 12, wherein the semiconductor device is a microprocessor.16. A device according to claim 15, wherein the microprocessor is at least one selected from the group consisting of a RISC processor and an ASIC processor.17. A device according to claim 12, wherein the semiconductor device is at least one selected from the group consisting of a cellular phone, a personal handy phone system, and a portable computer.18. An EL display device comprising:a plurality of MOSFETs formed in a single crystal semiconductor substrate, each of the plurality of MOSFETs comprising: a source region and a drain region each including a first impurity; a channel forming region being formed between the source region and the drain region; and an impurity region including a second impurity having an opposite conductive type to the first impurity and being formed under the channel forming region and in the source region, wherein the impurity region is not in contact with the drain region, wherein the impurity region is formed at a depth in a range of 20 to 150 nm from a surface of the single crystal semiconductor substrate, wherein a concentration of the second impurity in the channel forming region is from {fraction (1/100)} to {fraction (1/10)} of that in the impurity region, wherein the second impurity is introduced from a direction of the <110> axis with respect to the single crystal semiconductor substrate, so that the second impurity is introduced from a perpendicular direction to a plane having the smallest atomic density of the single crystal semiconductor substrate, wherein the concentration of the second impurity in the impurity region is in a range of 1×1018 to 1×1019 atoms/cm3, wherein the concentration of the second impurity in the channel forming region is in a range of 1×1016 to 1×1017 atoms/cm3. 19. An EL display device according to claim 18,wherein the first impurity is arsenic, and wherein the second impurity is phosphorus. 20. An EL display device according to claim 18, wherein the EL display device is incorporated into at least one selected from the group consisting of a cellular phone, a personal handy phone system and a portable computer.