[특허]Ball grid array resistor network

[미국특허] Ball grid array resistor network 원문보기

IPC분류정보
국가/구분	United States(US) Patent 등록
국제특허분류(IPC7판)	H01C-001/012
출원번호	US-0309704 (2002-12-04)
발명자 / 주소	Ernsberger, Craig Langhorn, Jason B. Tu, Yinggang
출원인 / 주소	CTS Corporation
인용정보	피인용 횟수 : 7 인용 특허 : 22

초록 ▼

A ball grid array resistor network has a planar substrate formed of an organic material. The substrate preferably is a printed circuit board. The substrate has a top and bottom surface. A ball pad is located on the bottom surface. A low temperature resistor is located on the bottom surface and is connected to the ball pad. A solder mask is located over the first surface except for the ball pads. A conductive ball is attached to the ball pad. A reflowed solder paste connects the conductive ball to the ball pad. Several embodiments of the invention are shown.

대표청구항 ▼

1. A resistor network comprising:a) a planar substrate formed of a polymeric material having a first and second surface; b) a metal layer attached to the second surface; c) a pair of ball pads located on the first surface; a) a resistor located on the first surface between the ball pads; b) a solder mask located over the first surface except for the ball pads; c) a conductive ball located adjacent to the ball pad; d) a reflowed solder paste partially surrounding the conductive ball and the ball pad, the reflowed solder paste connecting the conductive ball to the ball pad; and e) the resistor having a self-inductance, a self-capacitance, a first inductance between the resistor and the metal layer and a first capacitance between the resistor and the metal layer, the first capacitance canceling the self-inductance of the resistor such that the overall inductance of the resistor is minimized. 2. The resistor network of claim 1, wherein the metal layer is not connected to ground.3. The resistor network of claim 1, wherein the substrate has a pre-determined thickness and a pre-determined dielectric constant that are selected to reduce the resistor overall inductance.4. The resistor network of claim 1, wherein the polymer substrate is selected from the group consisting of:a) polyimide; b) FR4 glass epoxy; or c) a thermally conductive dielectric material.

이 특허에 인용된 특허 (22) 인용/피인용 타임라인 분석

Bloom Terry R. ; Cooper Richard O. ; Reinhard Robert L., Ball grid array R-C network with high density.
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Bloom Terry R. ; Cooper Richard O. ; Reinhard Robert L., Ball grid array capacitor.
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Bloom Terry R. ; Burry Stephen W. ; Seffernick Lewis L. ; VandenBoom Robert M. ; Zdanys ; Jr. John, Ball grid array resistor network.
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Poole David L. ; Reinhard Robert L. ; Cooper Richard O. ; DeMars Richard S., Ball grid array resistor terminator network.
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Kuo Charles C. Y. (Elkhart IN), Base metal resistive paints.
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Daly John J. ; Skepnek Robert, Connectorized substrate and method of connectorizing a substrate.
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Pieper Kevin J. ; Geeban Mitra E. ; Kolcz Richard J., Discrete component pad array carrier.
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Mazzochette Joseph B., High power resistor.
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Bloom Terry R. ; Cooper Richard O. ; Poole David L., Low cross talk ball grid array resistor network.
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Kukanskis Peter ; Larson Gary B. ; Bengston Jon ; Schweikher William, Method for the manufacture of printed circuit boards with plated resistors.
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Bowles, Philip Harbaugh; Mobley, Washington Morris; Parker, Richard Dixon; Ellis, Marion Edmond, Method of forming integral passive electrical components on organic circuit board substrates.
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Felten John James, Method to embed passive components.
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Akram Salman ; Hembree David R. ; Farnworth Warren M., Micromachined chip scale package.
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Seyama Kiyotaka (Kawasaki JPX) Kikuchi Shunichi (Kawasaki JPX) Sumiyoshi Makoto (Kawasaki JPX) Yasuda Naoki (Kawasaki JPX) Hirano Minoru (Kawasaki JPX) Nori Hitoshi (Kawasaki JPX), Multi-chip module having a multi-layer circuit board with insulating layers and wiring conductors stacked together.
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Barreto Joaquin (Sunrise FL) Alfonso Juan O. (Fort Lauderdale FL) Juskey Frank J. (Coral Springs FL), Multicomponent integrated circuit package.
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Clouser Sidney J. (Chardon OH) Lee Chinho (Lyndhurst OH) Prokop Mary K. (Cleveland Heights OH) Whevell Christopher J. (Willoughby OH), Resistive metal layers and method for making same.
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Ginn Steven N. ; Hufford James N. ; Zdanys ; Jr. John ; Burry Stephen W. ; Seffernick Lewis L. ; VandenBoom Robert M., Resistor network with solder sphere connector.
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Dunn Gregory J. ; Lach Lawrence E. ; Gamota Daniel R., Solderable pad with integral series termination resistor.
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Lach Lawrence E. ; Dunn Gregory J. ; Gamota Daniel R., Surface-mount device package having an integral passive component.
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Morris Frank J. (Plano TX), Thin film resistor and method for manufacturing the same.
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Morris Frank J. (Plano TX), Thin film resistor and method for manufacturing the same.
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Kennedy ; III Robert M. ; Korony Gheorghe ; Liu Donghang ; Mevissen Jeffrey P. ; Heistand ; II Robert H., Ultra-small resistor-capacitor thin film network for inverted mounting to a surface.
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이 특허를 인용한 특허 (7) 인용/피인용 타임라인 분석

Knecht, Thomas A.; Reeser, Glen; Vangala, Reddy; Niswonger, Damon, Ball grid array filter.
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Bloom,Terry R., Ball grid array package.
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Tanaka,Koichi, Circuit board having resistor and method for manufacturing the circuit board.
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Gebbie,Ian; Dennison,Ian; Haag,Zsolt; Dennison,Keith, Method and system for performing effective resistance calculation for a network of resistors.
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Gleason,Jeffery N.; Lindgren,Joseph T., Nickel bonding cap over copper metalized bondpads.
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Fujimoto, Koji, Surface mount composite electronic component and method for manufacturing same.
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Jacobson, Robert A.; Das Neves, Elisio C.; Reeser, Glen; Knecht, Thomas A., Voltage controlled oscillator module with ball grid array resonator.
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IPC	Description
A	생활필수품
A62	인명구조; 소방(사다리 E06C)
A62B	인명구조용의 기구, 장치 또는 방법(특히 의료용에 사용되는 밸브 A61M 39/00; 특히 물에서 쓰이는 인명구조 장치 또는 방법 B63C 9/00; 잠수장비 B63C 11/00; 특히 항공기에 쓰는 것, 예. 낙하산, 투출좌석 B64D; 특히 광산에서 쓰이는 구조장치 E21F 11/00)
A62B-1/08	.. 윈치 또는 풀리에 제동기구가 있는 것

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[미국특허] Ball grid array resistor network 원문보기