Mold assembly for a package stack via bottom-leaded plastic (blp) packaging
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
B29C-033/42
B29C-070/72
H01L-021/56
출원번호
US-0369067
(2003-02-18)
발명자
/ 주소
Tandy, Patrick W.
출원인 / 주소
Micron Technology, Inc.
대리인 / 주소
TraskBritt
인용정보
피인용 횟수 :
7인용 특허 :
36
초록▼
A packaged semiconductor device has bottom surface leads having portions of the package adjacent the lead edges excised. The outer leads may take the form of inverted-J leads, short stub leads, vertically bent leads-in-grooves, or may be entirely eliminated. Lead connections are on the bottom packag
A packaged semiconductor device has bottom surface leads having portions of the package adjacent the lead edges excised. The outer leads may take the form of inverted-J leads, short stub leads, vertically bent leads-in-grooves, or may be entirely eliminated. Lead connections are on the bottom package surface, over the top package surface, and/or on the sides and ends of the package, enabling vertical stacking of the devices and simultaneous/alternative coplanar horizontal connections to other semiconductor devices, circuit boards, etc. A mold assembly with a castellated inner surface forms a package with alternating grooves and columns for holding side and end electrical connection surfaces.
대표청구항▼
1. A mold assembly for encapsulating a semiconductor die and a portion of a leadframe in a transfer molding operation for forming a molded package having external surfaces formed of material used in said encapsulating of said semiconductor die and said portion of said leadframe, said assembly compri
1. A mold assembly for encapsulating a semiconductor die and a portion of a leadframe in a transfer molding operation for forming a molded package having external surfaces formed of material used in said encapsulating of said semiconductor die and said portion of said leadframe, said assembly comprising:a top mold plate having a top and a plurality of sides; and a generally planar bottom mold plate having portions thereof for sealably engaging portions of said top mold plate during said transfer molding operation, said top mold plate and said bottom mold plate forming a mold cavity having a top, having a bottom, having sidewalls and having end walls when sealably engaged, said top mold plate and said bottom mold plate for suspending said semiconductor die and a portion of said leadframe within said mold cavity for injecting a material to encapsulate said semiconductor die and portions of said leadframe therein, one sidewall of said sidewalls having an inner surface castellated with alternating grooves and columns for forming columns and grooves in at least one external surface of said molded package, said grooves in said inner surface of said one sidewall of said sidewalls have openings therein larger than a lead of said leadframe. 2. The mold assembly of claim 1, wherein said grooves in said inner surface of said one of said sidewalls have side portion surfaces angled to provide an opening dimension greater than an inner dimension of said grooves, said angle being in a range of 5 to 15 degrees.3. An assembly for encapsulating a semiconductor die and a portion of a leadframe in a molding operation, said assembly comprising:a top mold plate having a top and a plurality of sides; and a generally planar bottom mold plate having portions thereof engaging portions of said top mold plate during said molding operation, said top mold plate and said bottom mold plate when engaged forming a mold cavity having a top, having a bottom, having sidewalls and having end walls, said top mold plate and said bottom mold plate for suspending said semiconductor die and a portion of said leadframe within said mold cavity for injecting a material to encapsulate said semiconductor die and portions of said leadframe therein, one sidewall of said sidewalls having an inner surface having alternating grooves and columns, said grooves in said inner surface of said one sidewall of said sidewalls have openings therein. 4. The assembly of claim 3, wherein said grooves in said inner surface of said one of said sidewalls have side portion surfaces angled to provide an opening dimension greater than an inner dimension of said grooves, said angle being in a range of 5 to 15 degrees.5. An assembly for a semiconductor die and a portion of a leadframe in a molding operation, said assembly comprising:a top mold plate having a top and sides; and a bottom mold plate having portions thereof engaging portions of said top mold plate during said molding operation, said top mold plate and said bottom mold plate when engaged forming a mold cavity having a top, having a bottom, having sidewalls and having end walls, said top mold plate and said bottom mold plate for suspending said semiconductor die and a portion of said leadframe within said mold cavity for injecting a material to encapsulate said semiconductor die and portions of said leadframe therein, one sidewall of said sidewalls having an inner surface having alternating grooves and columns, said grooves in said inner surface of said one sidewall of said sidewalls have openings therein. 6. The assembly of claim 5, wherein said grooves in said inner surface of said one of said sidewalls have side portion surfaces angled to provide an opening dimension greater than an inner dimension of said grooves, said angle being in a range of 5 to 15 degrees.
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이 특허에 인용된 특허 (36)
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Hatakeyama Atsushi (Kawasaki JPX) Baba Fumio (Kawasaki JPX) Kasai Junichi (Kawasaki JPX) Sato Mitsutaka (Kawasaki JPX), Semiconductor device having a plurality of chips having identical circuit arrangement sealed in package.
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Merilo, Dioscoro A.; Kuan, Heap Hoe; Ong, You Yang; Chow, Seng Guan; Asoy, Ma. Shirley, Integrated circuit package-on-package stacking system and method of manufacture thereof.
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