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A method and apparatus for mapping some software prefetch instructions in a microprocessor system to a modified set of hardware prefetch instructions and executing the software prefetch by invoking the corresponding modified hardware prefetch instruction. For common software prefetch access patterns

A method and apparatus for mapping some software prefetch instructions in a microprocessor system to a modified set of hardware prefetch instructions and executing the software prefetch by invoking the corresponding modified hardware prefetch instruction. For common software prefetch access patterns, by mapping the software prefetches to hardware, improved prefetching can be achieved without the need for additional hardware.

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1. A method for efficiently utilizing resources in a data processing system employing software and hardware data prefetching instruction mechanisms, the method comprising:a) determining a value of a Stride field if Block Count field is not 1; b) mapping a subset of the software prefetch instructions

1. A method for efficiently utilizing resources in a data processing system employing software and hardware data prefetching instruction mechanisms, the method comprising:a) determining a value of a Stride field if Block Count field is not 1; b) mapping a subset of the software prefetch instructions to a modified version of the hardware prefetch mechanism if the Stride Field is within a specified parameter or if the Block Count field is 1; and c) executing a software prefetch instruction within the subset of included software prefetch instructions by invoking the modified hardware prefetch mechanism. 2. The method of claim 1 wherein the software prefetch instructions are Data Stream Touch (DST) instructions.3. The method of claim 1 wherein the hardware prefetch mechanism is a part of a VMX system architecture.4. A method of operating a data processing system in response to a software prefetch instruction, the method comprising:a) decoding the software prefetch instruction; b) responsive to the decoding, determining whether a value of a Stride field of the software prefetch instruction is within a set of predetermined values for each field within the instruction if Block Count field of the software prefetch instruction is not 1; c) if fields of the Stride field or Block Count field of the software prefetch instruction are within the set of predetermined values, mapping the decoded software prefetch instruction to a hardware prefetch mechanism; and d) invoking the hardware prefetch mechanism to perform the software prefetch instruction. 5. The method of claim 4 wherein the software prefetch instructions are Data Stream Touch (DST) instructions.6. The method of claim 4 wherein the hardware prefetch mechanism is a part of a VMX system architecture.7. A method for mapping a subset of software prefetch instructions, each software prefetch instruction comprising a Block Count field, a Block Size field and a Stride field, to a modified version of a hardware prefetch mechanism, the method comprising:a) determining the value in the Block Count field in the software prefetch instruction; b) if a value in the Block Count field is 1, mapping the software prefetch instruction for a number of lines obtained by the value in the Block Size field, to the modified hardware prefetch mechanism; c) if the value in the Block Count field is not 1, determining a value in the Stride field; d) responsive to step c), if the value in the Stride field representing a number of bytes is equal to a value in the Block Size field, mapping the software prefetch instruction for a number of lines of data equal to the value in the Block Count field, shifted based on the value in the Stride field to the modified hardware prefetch mechanism; e) responsive to step c), if the value in the Stride field representing the number of bytes is 128, mapping the software prefetch instruction for a number of lines of data equal to the value in the Block Count field to the modified hardware prefetch mechanism; f) responsive to step c), if the value in the Stride field representing the number of bytes is less than 128, mapping the software prefetch instruction for a number of lines of data equal to the value in the Block Count field, shifted based on the value in the Stride field to the modified hardware prefetch mechanism; g) responsive to step c), if the value in the Stride field representing the number of bytes is greater than 128, mapping the software prefetch instruction for a number of lines of data equal to the value in the Block Count field, shifted based on the value in the Stride field, with a line increment count that is a line multiple based on the value in the Stride field to the modified hardware prefetch mechanism; and h) means for precluding mapping the software prefetch instructions to the modified hardware prefetch mechanism if the values in said fields of software prefetch instructions are not within the values specified in steps a through g. 8. The method of claim 7 wherein the software prefetch instructions are Data Stream Touch (DST) instructions.9. The method of claim 7 wherein the hardware prefetch mechanism is a part of a VMX system architecture.10. The method of claim 7 wherein when the value in the Block Count field is 1, prefetching 4 lines of data if the value in the Block Size field is ‘0000’b, prefetching a number of lines equal to a block size of Z(1 to 2) if the value in the Block Size field is ‘000’b, and prefetching a number of lines equal to a block size of Z(1 to 2)+1 for any other value in the Block Size field.11. The method of claim 7 wherein when the value in the Block Count field is not 1, and the value in the Stride field is equal to the value in the Block Size field, shifting the value in the Block Count so that when the value in bits 7 through 12 of the Stride field is 1 00000, the Block Count is shifted to the left by 2, when the value in bits 7 through 12 of the Stride field is 0 1xxxx, the Block Count is shifted to the left by 1, when the value in bits 7 through 12 of the Stride field is 0 01xxx, the Block Count is not shifted, when the value in bits 7 through 12 of the Stride field is 0 001xx, the Block Count is shifted to the right by 1, when the value in bits 7 through 12 of the Stride field is 0 001xx, the Block Count is shifted to the right by 2, and when the value in bits 7 through 12 of the Stride field is 0 00001, the Block Count is shifted to the right by 3.12. The method of claim 7 wherein when the value in the Block Count field is not 1, and the value in the Stride field is less than 128 bytes, shifting the value in the Block Count so that when the value in bits 7 through 12 of the Stride field is 1 00000, the Block Count is shifted to the left by 2, when the value in bits 7 through 12 of the Stride field is 0 1xxxx, the Block Count is shifted to the left by 1, when the value in bits 7 through 12 of the Stride field is 0 01xxx, the Block Count is not shifted, when the value in bits 7 through 12 of the Stride field is 0 001xx, the Block Count is shifted to the right by 1, when the value in bits 7 through 12 of the Stride field is 0 001xx, the Block Count is shifted to the right by 2, and when the value in bits 7 through 12 of the Stride field is 0 00001, the Block Count is shifted to the right by 3.13. An apparatus for executing data prefetch instructions in a computer system having a memory, the apparatus comprising:a) a set of software prefetch instruction field parameters comprising Block Count, Block Size and Stride parameters stored in the memory of the computer system; b) a range of predetermined comparison values for Block Count, Block Size and Stride field parameters stored in the memory of the computer system; c) means for decoding the software prefetch instruction fields; d) means for comparing the values in the Block Count, Block Size, and Stride fields of the software prefetch instruction to the set of predetermined comparison values for the Block Count, Block Size, and Stride fields; e) means for mapping the decoded software prefetch instruction to a hardware prefetch mechanism if the Block Count field Parameter is 1 or if the values of the Stride field Parameters are within the set of predetermined comparison values; and f) means for invoking the hardware prefetch mechanism to perform the software prefetch instruction. 14. The apparatus of claim 12 wherein the software prefetch instructions stored in the memory of the computer are Data Stream Touch (DST) instructions.15. The apparatus of claim 12 wherein the hardware prefetch mechanism is a VMX system architecture mechanism.16. An apparatus for executing data prefetch instructions in a computer system having a memory, the apparatus comprising:a) a set of software prefetch instruction fields parameters stored in the memory of the computer, comprising a Block Count field, a Block Size field and a Stride field; b) means for determining a value in the Block Count field in the software prefetch instruction; c) means for mapping the software prefetch instruction fields for a number lines of data based on a value in the Block Size field, to a modified hardware prefetch mechanism, if the Block Count value is 1; d) means for determining a value in the Stride field if the value in the Block Count field is not 1; e) means for mapping the software prefetch instruction for a number of lines of data equal to the value in the Block Count field, shifted based on the value in the Stride field to the modified hardware prefetch mechanism, if the value in the Stride field representing the number of bytes is equal to the value in the Block Size field; f) means for mapping the software prefetch instruction for a number of lines of data equal to the value in the Block Count field to the modified hardware prefetch mechanism, if the value in the Stride field representing the number of bytes is 128; g) means for mapping the software prefetch instruction for a number of lines of data equal to the value in the Block Count field, shifted based on the value in the Stride field to the modified hardware prefetch mechanism, if the value in the Stride field representing the number of bytes is less than 128; h) means for mapping the software prefetch instruction for a number of lines of data equal to the value in the Block Count field, shifted based on the value in the Stride field, with a line increment count that is a line multiple based on the value in the Stride field to the modified hardware prefetch mechanism, if the value in the Stride field representing the number of bytes is greater than 128; and i) means for precluding mapping the software prefetch instructions to the modified hardware prefetch mechanism if the software prefetch instructions field narameters are not within the values specified in steps b through h. 17. The apparatus of claim 16 wherein the software prefetch instructions are Data Stream Touch (DST) instructions.18. The apparatus of claim 16 wherein the hardware prefetch mechanism is a part of a VMX system architecture.19. The apparatus of claim 16 wherein when the value in the Block Count field is 1, prefetching 4 lines of data if the value in the Block Size field is ‘0000’b, prefetching a number of lines equal to Z(1 to 2) if the value in the Block Size field is ‘000’b, and prefetching a number of lines equal to Z(1 to 2)for any other value in the Block Size field.20. The apparatus of claim 16 wherein when the value in the Block Count field is not 1, and the value in the Stride field is equal to the value in the Block Size field, shifting the value in the Block Count so that when the value in bits 7 through 12 of the Stride field is 1 00000, the Block Count is shifted to the left by 2, when the value in bits 7 through 12 of the Stride field is 0 1xxxx, the Block Count is shifted to the left by 1, when the value in bits 7 through 12 of the Stride field is 0 01xxx, the Block Count is not shifted, when the value in bits 7 through 12 of the Stride field is 0 001xx, the Block Count is shifted to the right by 1, when the value in bits 7 through 12 of the Stride field is 0 001xx, the Block Count is shifted to the right by 2, and when the value in bits 7 through 12 of the Stride field is 0 00001, the Block Count is shifted to the right by 3.21. The apparatus of claim 16 wherein when the value in the Block Count field is not 1, and the value in the Stride field is less than 128 bytes, shifting the value in the Block Count so that when the value in bits 7 through 12 of the Stride field is 1 00000, the Block Count is shifted to the left by 2, when the value in bits 7 through 12 of the Stride field is 0 1xxxx, the Block Count is shifted to the left by 1, when the value in bits 7 through 12 of the Stride field is 0 001xxx, the Block Count is not shifted, when the value in bits 7 through 12 of the Stride field is 0 001xx, the Block Count is shifted to the right by 1, when the value in bits 7 through 12 of the Stride field is 0 001xx, the Block Count is shifted to the right by 2, and when the value in bits 7 through 12 of the Stride field is 0 00001, the Block Count is shifted to the right by 3.22. A computer program product for translating computer software data prefetch instructions to computer hardware data prefetch instructions, the computer program product comprising:a) computer program code for determining values in a Block Count field, a Block Size field and a Stride field of the computer software data prefetch instructions; b) computer program code for determining if the value in the Block Count field is 1, and then mapping the software prefetch instruction for a number of lines of data based on the value in the Block Size field, to a modified hardware prefetch mechanism; c) computer program code for determining the value in the Stride field if the value in the Block Count field is not 1; d) computer program code for mapping the software prefetch instruction for a number of lines of data equal to the value in the Block Count field, shifted based on the value in the Stride field to the modified hardware prefetch mechanism, if the value in the Stride field representing the number of bytes is equal to the value in the Block Size field; e) computer program code for mapping the software prefetch instruction for a number of lines of data equal to the value in the Block Count field to the modified hardware prefetch mechanism, if the value in the Stride field representing the number of bytes is 128; f) computer program code for mapping the software prefetch instruction for a number of lines of data equal to the value in the Block Count field, shifted based on the value in the Stride field to the modified hardware prefetch mechanism, if the value in the Stride field representing the number of bytes is less than 128; g) computer program code for mapping the software prefetch instruction for a number of lines of data equal to the value in the Block Count field, shifted based on the value in the Stride field, with a line increment count that is a line multiple based on the value in the Stride field to the modified hardware prefetch mechanism, if the value in the Stride field representing the number of bytes is greater than 128; and h) computer program code for precluding mapping the software prefetch instructions to the modified hardware prefetch mechanism if the software prefetch instruction field parameters are not within the values specified in steps b through g. 23. The computer program product of claim 22 wherein when the value in the Block Count field is 1, prefetching 4 lines of data if the value in the Block Size field is ‘0000’b, prefetching a number of lines equal to a block size of Z(1 to 2) if the value in the Block Size field is ‘000’b, and prefetching a number of lines equal to a block size of Z(1 to 2)+1 for any other value in the Block Size field.24. The computer program product of claim 22 wherein when the value in the Block Count field is not 1, and the value in the Stride field is equal to the value in the Block Size field, shifting the value in the Block Count so that when the value in bits 7 through 12 of the Stride field is 1 00000, the Block Count is shifted to the left by 2, when the value in bits 7 through 12 of the Stride field is 0 1xxxx, the Block Count is shifted to the left by 1, when the value in bits 7 through 12 of the Stride field is 0 01xxx, the Block Count is not shifted, when the value in hits 7 through 12 of the Stride field is 0 001xx, the Block Count is shifted to the right by 1, when the value in bits 7 through 12 of the Stride field is 0 001xx, the Block Count is shifted to the right by 2, and when the value in bits 7 through 12 of the Stride field is 0 00001, the Block Count is shifted to the right by 3.25. The computer program product of claim 22 wherein when the value in the Block Count field is not 1, and the value in the Stride field is less than 128 bytes, shifting the value in the Block Count so that when the value in bits 7 through 12 of the Stride field is 1 00000, the Block Count is shifted to the left by 2, when the value in bits 7 through 12 of the Stride field is 0 1xxxx, the Block Count is shifted to the left by 1, when the value in bits 7 through 12 of the Stride field is 0 01xxx, the Block Count is not shifted, when the value in bits 7 through 12 of the Stride field is 0 001xx, the Block Count is shifted to the right by 1, when the value in bits 7 through 12 of the Stride field is 0 001xx, the Block Count is shifted to the right by 2, and when the value in bits 7 through 12 of the Stride field is 0 00001, the Block Count is shifted to the right by 3.