초록 ▼

A method of bonding lattice-mismatched semiconductors is provided. The method includes forming a Ge-based virtual substrate and depositing on the virtual substrate a CMP layer that forms a planarized virtual substrate. Also, the method includes bonding a Si substrate to the planarized virtual substr

A method of bonding lattice-mismatched semiconductors is provided. The method includes forming a Ge-based virtual substrate and depositing on the virtual substrate a CMP layer that forms a planarized virtual substrate. Also, the method includes bonding a Si substrate to the planarized virtual substrate and performing layer exfoliation on selective layers of the planarized virtual substrate producing a damaged layer of Ge. Furthermore, the method includes removing the damaged layer of Ge.

대표청구항 ▼

1. A method of bonding lattice-mismatched semiconductors comprising;forming a Ge-based virtual substrate; depositing on said virtual substrate a CMP layer that is polished to form a planarized virtual substrate; bonding a Si substrate to said planarized virtual substrate; performing layer exfoliatio

1. A method of bonding lattice-mismatched semiconductors comprising;forming a Ge-based virtual substrate; depositing on said virtual substrate a CMP layer that is polished to form a planarized virtual substrate; bonding a Si substrate to said planarized virtual substrate; performing layer exfoliation on selective layers of said planarized virtual substrate producing a damaged layer of Ge; and removing said damaged layer of Ge by selective etching. 2. The method of claim 1, wherein said virtual substrate comprises an etch-stop layer.3. The method of claim 1, wherein said virtual substrate comprises a III-V transfer layer.4. The method of claim 3, wherein said III-V transfer layer serves as an etch-stop.5. The method of claim 1, wherein said virtual substrate comprises a Si1-xGex passivation layer.6. The method of claim 1, wherein said virtual substrate comprises a Si3N4 passivation layer.7. The method of claim 1, wherein said CMP layer comprises an oxide.8. The method of claim 1, wherein said CMP layer comprises Si.9. The method of claim 2 further comprising removing said etch-stop layer after removing said damaged Ge layer.10. The method of claim 9, wherein said etch-stop comprises Si0.4Ge0.6.11. The method of claim 9, wherein said virtual substrate comprises at least one relaxed Ge layer and SiGe buffer.12. A method of bonding lattice-mismatched semiconductors comprising;forming a virtual substrate; using said virtual substrate to form a planarized virtual substrate; bonding a Si substrate to said planarized virtual substrate; and removing selective layers of damaged Ge after performing layer exfoliation on selective layers of said planarized virtual substrate associated with said virtual substrate. 13. The method of claim 12, wherein said virtual substrate comprises an etch-stop layer.14. The method of claim 12, wherein said virtual substrate comprises a III-V transfer layer.15. The method of claim 14, wherein said III-V transfer layer serves as an etch-stop.16. The method of claim 12, wherein said virtual substrate comprises a Si1-xGex passivation layer.17. The method of claim 12, wherein said virtual substrate comprises a Si3N4 passivation layer.18. The method of claim 12, wherein said planarized virtual substrate is formed using oxide.19. The method of claim 12, wherein said wherein said planarized virtual substrate is formed using Si1-xGex.20. The method of claim 13 further comprising removing said etch-stop layer after removing said damaged Ge layer.21. The method of claim 20, wherein said etch-stop comprises Si0.4Ge0.6.