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[미국특허] Electronic device packaging 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/02
출원번호 US-0075706 (2002-02-13)
발명자 / 주소
  • Featherby, Michael
  • DeHaven, Jennifer L.
출원인 / 주소
  • Sony Corporation
  • Sony Electronics, Inc.
대리인 / 주소
    Redwood Patent Law
인용정보 피인용 횟수 : 10  인용 특허 : 70

초록

A hermetically coated device includes an integrated semiconductor circuit die, a first layer comprising an inorganic material, the first layer enveloping the integrated semiconductor circuit die, a second layer, the second layer enveloping the integrated semiconductor circuit die. Formation of such

대표청구항

1. A hermeticseal for an electronic circuit die comprising:an inorganic layer for preventing moisture from reaching the electronic circuit die; an organic layer outside the inorganic layer for protecting the inorganic layer; and a plastic package. 2. The apparatus of claim 1 wherein the inorganic la

이 특허에 인용된 특허 (70) 인용/피인용 타임라인 분석

  1. Schubert Rolf (Absteinach DEX) Krner Christian (Weinheim-Rippenweiher DEX), Absorber for electromagnetic and acoustic waves.
  2. Stradley Norman H. (Stillwater MN) Woolley James A. (Coon Rapids MN), Alpha-particle-emitting ceramic composite cover.
  3. Bulucea Constantin (Milpitas CA) Dermirlioglu Esin (Cupertino CA) Aronowitz Sheldon (San Jose CA), CMOS latchup suppression by localized minority carrier lifetime reduction.
  4. Bulucea Constantin (Milpitas CA) Dermirlioglu Esin (Cupertino CA) Aronowitz Sheldon (San Jose CA), CMOS latchup suppression by localized minority carrier lifetime reduction.
  5. Comizzoli Robert B. (Belle Mead NJ), Chemically treating the overcoat of a semiconductor device.
  6. Williams ; Robert Powell ; Polinsky ; Murray Arthur, Combination glass/low temperature deposited Si.sub.w N.sub.x H.sub.y O.sub.z passivating overcoat with improved crack a.
  7. Grabbe ; Dimitry G., Connector for connecting a circuit element to the surface of a substrate.
  8. Kersch Dennis R. (Phoenix AZ) Mitchell Don E. (Phoenix AZ), Copper body power hybrid package and method of manufacture.
  9. Wills Kendall Scott ; Rodriguez Paul Anthony, Device packaging using heat spreaders and assisted deposition of wire bonds.
  10. Ostop John A. ; Chen Li-Shu, Die attached process for SiC.
  11. Buonanno Samuel S. (Fairport NY), EMI shielding seal with partial conductive sheath.
  12. Sato Mitsuharu,JPX ; Yoshida Shigeyoshi,JPX ; Sato Tadakuni,JPX ; Inabe Toshihisa,JPX ; Togawa Hitoshi,JPX, Electronic device having the electromagnetic interference suppressing body.
  13. Hashizume Shozi,JPX, Fabrication method of plastic-packaged semiconductor device.
  14. Gow ; 3rd John (Milton VT) Noth Richard W. (Fairfax VT), High performance versatile thermally enhanced IC chip mounting.
  15. Oshiba Katsuyuki (Kanagawa JPX), High-frequency circuit package.
  16. Kirt Daryl L. (Rte. 4 ; Box 276A Pierz MN 56364), Hone stop assembly.
  17. Marcantonio Gabriel (Nepean CAX) Nguyen Khanh (Nepean CAX), Integrated circuit package and assembly thereof for thermal and EMI management.
  18. Long Jon M. (Livermore CA), Integrated circuit package with device and wire coat assembly.
  19. Livshits Boris I. (Nepean CAX) Harpell Kevin E. (Ottawa CAX), Integrated circuit packaging.
  20. Schelhorn Robert L. (Vincentown NJ), Metallized ceramic circuit package.
  21. Inagaki Akihiro (Minamiashigara JPX) Yamamura Isao (Minamiashigara JPX), Method for encapsulating a semiconductor utilizing an epoxy resin and an onium salt compound.
  22. Highum Edward Allan ; Mueller Alfred Wilhelm ; Nash Thomas William ; Stadler Ewald Emil Gottlob,DEX ; Thorvilson Scott Marvin, Method for manufacturing electro-magnetic shield having multiple polymeric layers of differing fill compositions.
  23. Durand David (Portsmouth RI), Method for producing a shielded plastic enclosure to house electronic equipment.
  24. Havens Ross Downey ; Japp Robert Maynard ; Knight Jeffrey Alan ; Poliks Mark David ; Quinn ; deceased Anne M., Method for providing a protective coating and electronic package utilizing same.
  25. Sloan James W. (Austin TX) Tran Truoc T. (Austin TX) Jones ; III Frank T. (Austin TX), Method for providing alpha particle protection for an integrated circuit die.
  26. Yerman Alexander J. (Scotia NY), Method for providing substantially hermetic sealing means for electronic components.
  27. Knecht Thomas A. (Algonquin IL), Method of encapsulating a crystal oscillator.
  28. Fierkens Richardus H. J. (Keurbeek 15 Herwen NLX), Method of encapsulating microelectronic elements.
  29. Mallik Debendra (2139 S. Cottonwood Mesa AZ 85202) Bhattacharyya Bidyut K. (5063 W. Boston Way Chandler AZ 85226), Method of making a multilayer molded plastic IC package.
  30. Mori Ryuichiro (Itami JPX), Method of making resin molded semiconductor device.
  31. Kato Tsuguo (Fujisawa JPX) Thai Cao M. (Yokohama JPX), Method of manufacturing a molding using a filler or an additive concentrated on an arbitrary portion or distributed at a.
  32. Yamazaki Shunpei (Tokyo JPX) Ishida Noriya (Atsugi JPX) Sakama Mitsunori (Hiratsuka JPX) Sasaki Mari (Atsugi JPX), Method of packaging an electronic device using a common holder to carry the device in both a CVD and molding step.
  33. Sono Michio (Kawasaki JPX) Kasai Junichi (Kawasaki JPX), Method of producing semiconductor device having radiation part made of resin containing insulator powders.
  34. Sakai Kunito (Hyogo JPX) Matsuda Sadamu (Hyogo JPX) Takahama Takashi (Hyogo JPX), Method of resin encapsulating a semiconductor device.
  35. Kang Wonjae L. (Sunnyvale CA), Method of using latchup current to blow a fuse in an integrated circuit.
  36. Eichelberger Charles W. (Schenectady NY), Methods for testing and burn-in of integrated circuit chips.
  37. Scherer Jeremy D. (South Dartmouth MA), Microcircuit package and sealing method.
  38. Mallik Debendra (Mesa AZ) Bhattacharyya Bidyut K. (Chandler AZ), Multi-layer molded plastic IC package.
  39. Camilletti Robert Charles ; Haluska Loren Andrew ; Michael Keith Winton, Multilayer coating for microelectronic devices.
  40. Landsittel ; David Thomas, Novel method and apparatus for hermetic encapsulation for integrated circuits and the like.
  41. Longden Larry L. (San Diego CA), Nuclear event detector.
  42. Miyahara Kenichiro (Tokuyama JPX), Package for semiconductor device.
  43. Jan V. Shubert ; Glen Wada ; Mansour Moinpour ; Yang-Chin Shih ; Ken Schatz, Passivation for tight metal geometry.
  44. Paquette Edward L. (Claremont CA) Riley William C. (Palos Verdes Estates CA) Taparauskas Paul A. (Solana Beach CA) Warren James W. (Woodland Hills CA), Printed circuit board with inorganic insulating matrix.
  45. Weiler Peter M. (Palo Alto CA) Burke Thomas S. (San Francisco CA), Process for coated bonding wires in high lead count packages.
  46. Balda Raymond J. (Tempe AZ) Bukhman Yefim (Tempe AZ) Goodner Willis R. (Chandler AZ), Process for fabricating semiconductor device.
  47. Koto Noriaki (Ichihara JPX) Yukawa Joei (Ichihara JPX) Moro Takeo (Ichihara JPX), Process for the production of a silver coated copper powder and conductive coating composition.
  48. Zechman John Harold, Process of making an integrated circuit chip composite.
  49. Valy Yves (Saint Medard En Jalles FRX) Gadbin Michel (Merignac FRX) Banchelin Jean S. L. (Le Haillan FRX) Bourcereau Jean (Bordeaux FRX), Protective box for electronic circuits hardened with respect to X-rays.
  50. Sainte Luce Banchelin Jean (Le Haillan FRX) Bourcereau Jean (Bordeaux FRX) Valy Yves (St. Medard en Jalles FRX), Protective sheath for electrical or optical conductors hardened with respect to X-rays.
  51. Hajdu Juan B. (Orange CT) Bastenbeck Edwin W. (Plymouth CT), RFI shielded plastic articles and process for making same.
  52. Dlugokecki Joseph J. (13666 Quiet Hills Dr. Poway CA 92064) Florian Joseph R. (11207 Zapata Ave. San Diego CA 92126), Radiation shielding for integrated circuit devices using reconstructed plastic packages.
  53. Strobel David J. ; Czajkowski David R., Radiation shielding of plastic integrated circuits.
  54. Strobel David J. ; Czajkowski David R., Radiation shielding of plastic integrated circuits.
  55. Czajkowski David ; Eggleston Neil ; Patterson Janet, Radiation shielding of three dimensional multi-chip modules.
  56. Suzuki Osamu (Yokohama JPX), Resin molded article bearing electric circuit patterns and process for producing the same.
  57. Sono Michio (Yamato JPX), Resin-sealed radiation shield for a semiconductor device.
  58. Nelson Keith W. (St. Louis Park MN) Lenz James E. (Brooklyn Park MN) Kawai Takeshi (Kanagawa JPX), Semiconductor device housing with magnetic field protection.
  59. Saitoh Takehiro,JPX, Semiconductor device molded in plastic package free from crack by virtue of organic stress relaxation layer.
  60. Crane Jacob (Woodbridge CT) Johnson Barry C. (Tucson AZ) Mahulikar Deepak (Meriden CT) Butt Sheldon H. (Godfrey IL), Semiconductor package.
  61. Butt Sheldon H. (Godfrey IL), Semiconductor packaging.
  62. Durand David (Providence RI), Shielded plastic enclosure to house electronic equipment.
  63. Inoue Akira (Itami JPX), Shielded semiconductor device.
  64. Osorio Rolando J. (Manchaca TX), Shielded stripline configuration semiconductor device and method for making the same.
  65. Novich Bruce E., Spacers, spacer units, image display panels and methods for making and using the same.
  66. Abbott Donald C. (Norton MA), Stabilizer/spacer for semiconductor device lead frames.
  67. Kimbrough Joseph Robert (Pleasanton CA) Colella Nicholas John (Livermore CA), System level latchup mitigation for single event and transient radiation effects on electronics.
  68. Runyan Michael D. (Torrance CA), Totally enclosed hermetic electronic module.
  69. Soldner Keith D. (Coral Springs FL) Juskey Frank J. (Coral Springs FL) Freyman Bruce J. (Plantation FL) Miles Barry M. (Plantation FL), Transfer molded semiconductor device package with integral shield.
  70. Nakamura Koji,JPX ; Komori Hideki,JPX ; Oda Mitsuyuki,JPX ; Kanda Kazunori,JPX, Wide bandwidth electromagnetic wave absorbing material.

이 특허를 인용한 특허 (10) 인용/피인용 타임라인 분석

  1. Kobrin, Boris; Chin, Jeffrey D.; Janeiro, Benigno A.; Nowak, Romuald, Articles with super-hydrophobic and-or super-hydrophilic surfaces and method of formation.
  2. Li, Felix C.; Lee, Yee Kim; Lim, Peng Soon; Yii, Terh Kuen; Lee, Lee Han Meng@Eugene, Delamination resistant device package having low moisture sensitivity.
  3. Li, Felix C.; Lee, Yee Kim; Lim, Peng Soon; Yii, Terh Kuen; Lee, Lee Han Meng@Eugene, Delamination resistant device package having raised bond surface and mold locking aperture.
  4. Kobrin, Boris; Dangaria, Nikunj; Nowak, Romuald; Grimes, Michael T., Durable, heat-resistant multi-layer coatings and coated articles.
  5. Kobrin, Boris; Hirji, Dangaria Nikunji; Nowak, Romuald; Grimes, Michael T., Durable, heat-resistant multi-layer coatings and coated articles.
  6. Takahashi, Noriyuki, Manufacturing method of semiconductor device, and semiconductor device.
  7. Anderson, Curtis W.; Sangiorgi, James A., Method for producing shock and tamper resistant microelectronic devices.
  8. Tsuruoka, Junji; Aoki, Kazuo; Ono, Masaki; Yoshihara, Katsuhiko, Semiconductor device and method for fabricating the same.
  9. Mahler, Joachim; Yong, Wae Chet; Doraisamy, Stanley Job; Deml, Gerhard; Fischer, Rupert; Engl, Reimund, Semiconductor device including isolation layer.
  10. Mahler, Joachim; Wombacher, Ralf; Lachman, Dieter; Betz, Bernd; Paulus, Stefan; Riedl, Edmund, Semiconductor device with semiconductor device components embedded in a plastic housing composition.

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