IPC분류정보
국가/구분 |
United States(US) Patent
등록
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국제특허분류(IPC7판) |
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출원번호 |
US-0662153
(2000-09-14)
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발명자
/ 주소 |
- Frenger, P{dot over (a)}l
- Dahlman, Erik
- Parkvall, Stefan
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출원인 / 주소 |
- Telefonaktiebolaget L M Ericsson (publ)
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대리인 / 주소 |
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인용정보 |
피인용 횟수 :
114 인용 특허 :
15 |
초록
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A hybrid ARQ scheme is used incremental data packet combining. In an example embodiment, the hybrid ARQ scheme with incremental data packet combining employs three feedback signaling commands: ACK, NACK, and LOST. Using these three feedback commands, the hybrid ARQ scheme with incremental data packe
A hybrid ARQ scheme is used incremental data packet combining. In an example embodiment, the hybrid ARQ scheme with incremental data packet combining employs three feedback signaling commands: ACK, NACK, and LOST. Using these three feedback commands, the hybrid ARQ scheme with incremental data packet combining provides both robustness and good performance. This scheme is particularly advantageous in communication systems with unreliable communication channels, e.g., a fading radio channel, where forward error correction (FEC) codes are used and some of the code symbols are more important than other code symbols. Benefits include increased throughput and decreased delay of the packet data communication.
대표청구항
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1. For use in data packet transmissions between a transmitter and a receiver where a data packet includes a first type of bits corresponding to actual information bits and a second type of bits corresponding to parity bits, the information bits being more important to decoding than the parity bits,
1. For use in data packet transmissions between a transmitter and a receiver where a data packet includes a first type of bits corresponding to actual information bits and a second type of bits corresponding to parity bits, the information bits being more important to decoding than the parity bits, a method comprising:detecting an error in a received data packet;sending a negative acknowledgment signal to the transmitter to trigger a first type of retransmission of the parity bits to be used in a subsequent decoding operation at the receiver;detecting an absence of a lost data packet;sending a lost signal message to the transmitter rather than the negative acknowledgment signal, the lost signal message indicating that the lost data packet was detected as not received;in response to the sending of the lost signal message, receiving from the transmitter a second different type of retransmission of the information bits of the lost data packet;decoding the second different type retransmission.2. The method in claim 1, wherein the different second type retransmission also includes a first set of the parity bits of the lost data packet.3. The method in claim 2, further comprising:if the decoding of the second different type retransmission is not successful, sending the negative acknowledgment signal to the transmitter;receiving from the transmitter a third type of retransmission including a second set of the parity bits different from the first set;decoding the data packet using information from the second and third type retransmissions.4. The method in claim 3, wherein the third type retransmission does not include the information bits.5. The method in claim 3, wherein the third type retransmission includes the information bits and the second set of the parity bits.6. The method in claim 1, wherein the lost data packet is detected as absent by determining that a packet with a particular identifier expected to be received was not received in an expected time period.7. The method in claim 1, wherein the lost data packet is detected as absent by comparing a decoding result for the packet with a threshold.8. A method of processing received encoded data packets, each encoded data packet including a first group of bits corresponding to actual information bits and a second group of bits corresponding to parity bits, where the information bits are more important to decoding the data packet than the parity bits, comprising:decoding a received packet to produce an interim decoding result;determining if the interim decoding result is above a threshold;if the interim decoding result indicates an error in the received packet and the interim decoding result is at or above the threshold, sending a negative acknowledgement signal to trigger a first type of retransmission of the parity bits;if the interim decoding result is not above the threshold, sending a lost signal message rather than the negative acknowledgement signal to trigger a second type of retransmission of the information bits of the data packet, the second type of retransmission being different from the first type of retransmission, the lost signal message indicating that the data packet was detected as absent;receiving a second type of retransmission of the information bits of the data packet;decoding the second type retransmission.9. The method in claim 8, wherein the second type retransmission also includes a first set of the parity bits of the data packet.10. The method in claim 8, further comprising:if the decoding of the second retransmission is not successful, sending the negative acknowledgment to the transmitter;receiving from the transmitter a third type retransmission including a second set of the parity bits different from the first set;decoding the data packet using information from the second and third type retransmissions.11. The method in claim 10, wherein the third type retransmission only includes the second set of parity bits.12. The method in claim 10, wherein the third type transmission retransmission includes the information bits and the second set of the parity bits.13. Apparatus for use in a transmitter which transmits data over a communications channel, comprising:a signal processor configured to process data and generate corresponding systematic information bits and parity bits;a combiner configured to selectively receive systematic information bits and parity bits and generate a coded data packet;transceiving circuitry configured to transmit coded data packets over the communications channel;a controller configured to control which bits are selected by the combiner to generate the coded data packet based on feedback from a receiver;wherein when a negative acknowledgment signal is received, the controller is configured to send a first type of retransmission with parity bits over the communications channel to the receiver;wherein when a lost signal message is received, the lost signal message indicating that the data packet was detected as absent, the controller is configured to send a second type of retransmission with the systematic information bits over the communications channel to the receiver; andwherein the first type of retransmission is different from the second type of retransmission.14. The apparatus in claim 13, wherein the signal processor and combiner is implemented using a turbo encoder.15. The apparatus in claim 14, wherein the communications channel is a radio channel.16. The apparatus in claim 13, wherein when the lost signal message is received or no acknowledgment signal or negative acknowledgment signal is received, the systematic information bits are retransmitted over the communications channel to the receiver along with parity bits originally transmitted with the systematic information bits.17. The apparatus in claim 13, wherein when the lost signal is received or no acknowledgment signal or negative acknowledgment signal is received, the systematic information bits are retransmitted over the communications channel to the receiver along with parity bits different from the parity bits originally transmitted with the systematic information bits.18. The apparatus in claim 13, wherein when the systematic information bits are retransmitted, and a negative acknowledgment signal is received in response to the retransmission, parity bits associated with the systematic information bits are retransmitted over the communications channel to the receiver without the systematic information bits.19. The apparatus in claim 13, wherein when a negative acknowledgment signal is received, the systematic information bits are retransmitted over the communications channel to the receiver along with parity bits.20. The apparatus in claim 13, wherein when a negative acknowledgment signal is received, parity bits are transmitted over the communications channel to the receiver without the systematic information bits.21. Apparatus for use in a receiver which receives data over a communications channel, comprising:transceiving circuitry configured to receive a coded data packet transmitted over the communications channel by a transmitter, where an initially transmitted coded data packet includes a first type of bits corresponding to actual information bits and a second type of bits corresponding to parity bits, the information bits being more important to decoding than the parity bits; andpacket processing circuitry configured to detect the absence of an expected packet and to transmit a lost signal message to the transmitter rather than a negative acknowledgement signal, the lost signal message indicating that the data packet was detected as absent, and thereafter, to decode a first retransmission of the expected packet which includes the information bits,wherein if decoding of the first retransmission is not successful, the packet processing circuitry is configured to send the negative acknowledgment signal to the transmitter, and in response, a second retransmission is received including a set of the parity bits without the information bits.22. The apparatus in claim 21, wherein the packet processing circuitry includes:a decoder for decoding a received data packet, andwherein if the data packet cannot be properly decoded, the lost signal message is sent to the transmitter.23. The apparatus in claim 21, wherein the packet processing circuitry includes:a buffer for storing received data packet information;a combiner for combining buffer information with retransmitted information;a decoder for decoding an output of the combiner; anda controller coupled to the buffer, combiner, and decoder.24. The apparatus in claim 23, wherein the decoder is a turbo decoder.25. The apparatus in claim 23, wherein the buffer and the combiner perform an incremental redundancy operation.26. The apparatus in claim 23, wherein the decoder performs error correction and the packet processing circuitry further detects errors in the output of the decoder.27. The apparatus in claim 23, wherein if the decoder output is not acceptable, the controller is configured to send the negative acknowledgment signal to the transmitter.28. The apparatus in claim 21, wherein the first retransmission also includes a first set of the parity bits.29. The apparatus in claim 21, wherein the second transmission is received including the information bits and the parity bits.
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