System, method and computer program product for branching during programmable vertex processing
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
G09G-005/37
G09G-005/36
G06T-001/60
출원번호
US-0391930
(2003-03-19)
발명자
/ 주소
Lindholm,John Erik
Moy,Simon S.
Glanville,Robert Steven
출원인 / 주소
NVIDIA Corporation
대리인 / 주소
Zilka Kotab, PC
인용정보
피인용 횟수 :
30인용 특허 :
41
초록▼
A system, method and computer program product are provided for branching during graphics processing. Initially, a first operation is performed on data. In response to the first operation, a branching operation is performed to a second operation. The first operation and the second operation are assoc
A system, method and computer program product are provided for branching during graphics processing. Initially, a first operation is performed on data. In response to the first operation, a branching operation is performed to a second operation. The first operation and the second operation are associated with instructions selected from a predetermined instruction set.
대표청구항▼
What is claimed is: 1. A method for branching during graphics processing, comprising: performing a first operation on data; and in response to the first operation, branching to a second operation; wherein the first operation and the second operation are associated with instructions selected from a
What is claimed is: 1. A method for branching during graphics processing, comprising: performing a first operation on data; and in response to the first operation, branching to a second operation; wherein the first operation and the second operation are associated with instructions selected from a predetermined instruction set; wherein the branching to the second operation is performed based on a Boolean condition; wherein the branching to the second operation is performed if content of a predetermined register is true; wherein the branching involves a swizzle operation; wherein the first operation and the second operation are selected from a group consisting of a branch operation, a call operation, a fraction operation, a no operation, a move operation, a multiply operation, an addition operation, a multiply and addition operation, a reciprocal operation, a reciprocal square root operation, a three component dot product operation, a four component dot product operation, a distance operation, a minimum operation, a maximum operation, an exponential operation, a logarithm operation, and a lighting operation. 2. The method as recited in claim 1, wherein the branching to the second operation is performed based on a comparison. 3. The method as recited in claim 2, wherein the comparison includes a greater than operation. 4. The method as recited in claim 2, wherein the comparison includes a less than operation. 5. The method as recited in claim 2, wherein the comparison includes a greater than or equal operation. 6. The method as recited in claim 2, wherein the comparison includes a less than or equal operation. 7. The method as recited in claim 2, wherein the comparison includes an equal operation. 8. The method as recited in claim 2, wherein the comparison includes a not equal operation. 9. The method as recited in claim 1, wherein the branching to the second operation is performed based on a comparison involving zero. 10. The method as recited in claim 1, wherein the branching is performed to a label. 11. The method as recited in claim 1, and further comprising performing the swizzling operation on the data. 12. The method as recited in claim 11, wherein the swizzling operation involves vector components. 13. The method as recited in claim 12, wherein the swizzling operation involves condition codes. 14. A system for branching during graphics processing, comprising: means for performing a first operation on data, and means for branching to a second operation, in response to the first operation; wherein the first operation and the second operation are associated with instructions selected from a predetermined instruction set; wherein the branching to the second operation is performed based on a Boolean condition; wherein the branching to the second operation is performed if content of a predetermined register is true; wherein the branching involves a swizzle operation; wherein the first operation and the second operation are selected from a group consisting of a branch operation, a call operation, a fraction operation, a no operation, a move operation, a multiply operation, an addition operation, a multiply and addition operation, a reciprocal operation, a reciprocal square root operation, a three component dot product operation, a four component dot product operation, a distance operation, a minimum operation, a maximum operation, an exponential operation, a logarithm operation, and a lighting operation. 15. A computer program product for branching during graphics processing, comprising: computer code for performing a first operation on data; and computer code for branching to a second operation in response to the first operation; wherein the first operation and the second operation are associated with instructions selected from a predetermined instruction set; wherein the branching to the second operation is performed based on a Boolean condition; wherein the branching to the second operation is performed if content of a predetermined register is true; wherein the branching involves a swizzle operation; wherein the first operation and the second operation are selected from a group consisting of a branch operation, a call operation, a fraction operation, a no operation, a move operation, a multiply operation, an addition operation, a multiply and addition operation, a reciprocal operation, a reciprocal square root operation, a three component dot product operation, a four component dot product operation, a distance operation, a minimum operation, a maximum operation, an exponential operation, a logarithm operation, and a lighting operation. 16. An application program interface data structure for branching during graphics processing, comprising: an instruction set for performing a first operation on data, and in response to the first operation, branching to a second operation; wherein the branching to the second operation is performed based on a Boolean condition; wherein the branching to the second operation is performed if content of a predetermined register is true; wherein the branching involves a swizzle operation; wherein the instruction set includes operations selected from a group consisting of a fraction operation, a no operation, a move operation, a multiply operation, an addition operation, a multiply and addition operation, a reciprocal operation, a reciprocal square root operation, a three component dot product operation, a four component dot product operation, a distance operation, a minimum operation, a maximum operation, an exponential operation, a logarithm operation, and a lighting operation. 17. A system for branching during graphics processing, comprising: a functional module adapted for performing a first operation on data, and branching to a second operation; wherein the first operation and the second operation are associated with instructions selected from a predetermined instruction set; wherein the branching to the second operation is performed based on a Boolean condition; wherein the branching to the second operation is performed if content of a predetermined register is true; wherein the branching involves a swizzle operation; wherein the predetermined instruction set includes a fraction operation, a no operation, a move operation, a multiply operation, an addition operation, a multiply and addition operation, a reciprocal operation, a reciprocal square root operation, a three component dot product operation, a four component dot product operation, a distance operation, a minimum operation, a maximum operation, an exponential operation, a logarithm operation, and a lighting operation. 18. A method for branching during graphics processing, comprising: performing a first operation on data; and in response to the first operation, branching to a second operation; wherein the first operation and the second operation are associated with instructions selected from a predetermined instruction set; wherein the branching to the second operation is performed based on a Boolean condition; wherein at least one of the first operation and the second operation includes an operation selected from a group consisting of a branch operation, a call operation, a fraction operation, a no operation, a move operation, a multiply operation, an addition operation, a multiply and addition operation, a reciprocal operation, a reciprocal square root operation, a three component dot product operation, a four component dot product operation, a distance operation, a minimum operation, a maximum operation, an exponential operation, a logarithm operation, and a lighting operation. 19. A method for branching during graphics processing, comprising: performing a first operation on data; and in response to the first operation, branching to a second operation; wherein the first operation and the second operation are associated with instructions selected from a predetermined instruction set; wherein the branching to the second operation is performed if content of a predetermined register is true; wherein the first operation and the second operation am selected from a group consisting of a branch operation, a call operation, a fraction operation, a no operation, a move operation, a multiply operation, an addition operation, a multiply and addition operation, a reciprocal operation, a reciprocal square root operation, a three component dot product operation, a four component dot product operation, a distance operation, a minimum operation, a maximum operation, an exponential operation, a logarithm operation, and a lighting operation. 20. A method for branching during graphics processing, comprising: performing a first operation on data; and in response to the first operation, branching to a second operation; wherein the first operation and the second operation are associated with instructions selected from a predetermined instruction set; wherein the branching involves a swizzle operation; wherein at least one of the first operation and the second operation includes at least one of a fraction operation, a no operation, a move operation, a multiply operation, an addition operation, a multiply and addition operation, a reciprocal operation, a reciprocal square root operation, a three component dot product operation, a four component dot product operation, a distance operation, a minimum operation, a maximum operation, an exponential operation, a logarithm operation, and a lighting operation. 21. A method for branching during graphics processing, comprising: performing a first operation on data; and in response to the first operation, branching to a second operation; wherein the first operation and the second operation are associated with instructions selected from a predetermined instruction set; wherein the branching to the second operation is performed based on a Boolean condition; wherein the branching to the second operation is performed based on a comparison; wherein the comparison includes a greater than operation, a less than operation, a greater than or equal operation, a less than or equal operation, an equal operation, and a not equal operation; wherein the branching is performed to a label; wherein the branching to the second operation is performed if content of a predetermined register is true; wherein the branching to the second operation is performed based on a comparison involving zero; wherein the branching involves a swizzle operation; wherein the predetermined instruction set includes a fraction instruction, a no instruction, a move instruction, a multiply instruction, an addition instruction, a multiply and addition instruction, a reciprocal instruction, a reciprocal square root instruction, a three component dot product instruction, a four component dot product instruction, a distance instruction, a minimum instruction, a maximum instruction, an exponential instruction, a logarithm instruction, and a lighting instruction; wherein the swizzling operation is performed on the data; wherein the swizzling operation involves vector components.
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Brown,Patrick R.; Kilgard,Mark J.; Glanville,Robert Steven, System and method for converting a vertex program to a binary format capable of being executed by a hardware graphics pipeline.
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