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An integrated circuit arranged and constructed to determine an upper data rate for a variable data rate signal and method thereof includes a buffer, comparator, and combiner that are operable to compare a characteristic, such as an energy statistic of a number of partial symbols constructed from the

An integrated circuit arranged and constructed to determine an upper data rate for a variable data rate signal and method thereof includes a buffer, comparator, and combiner that are operable to compare a characteristic, such as an energy statistic of a number of partial symbols constructed from the variable data rate signal to a first threshold that corresponds to the number to provide a first comparison; process the variable data rate signal at a first data rate when the first comparison is favorable; compare the characteristic to a second threshold that corresponds to the number to provide a second comparison; and combine the partial symbols to provide other partial symbols at a second data rate that is less than the first data rate when the second comparison is favorable.

대표청구항 ▼

What is claimed is: 1. A method of determining an upper data rate for a variable data rate signal, the method including the steps of: first comparing a characteristic of a first number of first partial symbols constucted from the variable data rate signal to a first threshold to provide a first com

What is claimed is: 1. A method of determining an upper data rate for a variable data rate signal, the method including the steps of: first comparing a characteristic of a first number of first partial symbols constucted from the variable data rate signal to a first threshold to provide a first comparison, said first threshold corresponding to said first number, said first number less than all first partial symbols in a frame; processing the variable data rate signal at a first data rate when said first comparison is favorable; second comparing said characteristic of said first number of said first partial symbols to a second threshold to provide a second comparison, said second threshold corresponding to said first number; and combining said first partial symbols to provide second partial symbols at a second data rate that is less than said first data rate when said second comparison is favorable. 2. The method of claim 1 further including, when said first comparison and said second comparison are not favorable, a step of increasing said first number to a second number of said first partial symbols and repeating said first comparing, said processing, said second comparing, and said combining steps. 3. The method of claim 1 further including, when said second comparison is favorable, repeating the steps of claim 1 as follows: first comparing a characteristic of a second number of said second partial symbols constructed from the variable data rate signal to a third threshold to provide a third comparison, said third threshold corresponding to said second number; processing the variable data rate signal at said second data rate when said third comparison is favorable; second comparing said characteristic of said second number of said second partial symbols to a fourth threshold to provide a fourth comparison, said fourth threshold corresponding to said second number; and combining said second partial symbols to provide third partial symbols at a third data rate that is less than said second data rate when said fourth comparison is favorable. 4. The method of claim 1 wherein said first comparing said characteristic further includes comparing a characteristic that is proportional to an energy of said first number of said first partial symbols. 5. The method of claim 1 wherein said first comparing said characteristic to said first threshold further includes comparing said characteristic to a threshold that confirms that the variable data rate signal includes said first data rate to a predetermined confidence level. 6. The method of claim 5 wherein said threshold corresponds to an expected mean for said first number of said first partial symbols plus a predetermined number of standard deviations when the variable data rate signal does not include said first data rate so that when said characteristic exceeds said threshold said first comparison is favorable implying said first data rate is present wit a confidence level corresponding to said predetermined number of said standard deviations. 7. The method of claim 1 wherein said second comparing said characteristic to said second threshold further includes comparing said characteristic to a threshold that confirms that the variable data rate signal does not include said first data rate to a predetermined confidence level. 8. The method of claim 7 wherein said threshold corresponds to an expected mean for said first number of said first partial symbols less a predetermined number of standard deviations when the variable data rate signal includes said first data rate so that when said characteristic is less than said threshold said second comparison is favorable implying said first date data is not present with a confidence level corresponding to said predetermined number of said standard deviations. 9. The method of claim 1 wherein said first comparing said characteristic further includes comparing a characteristic that is proportional to one of a sum of squared linear combinations of said first number of said first partial symbols and a channel estimate corresponding to said first number of said first partial symbols. 10. The method of claim 1 wherein the variable data rate signal is a Code Division Multiple Access signal having variable data rates. 11. The method of claim 1 wherein said first data rate is the highest possible data rate for the variable data rate signal. 12. An integrated circuit arranged and constructed to determine an upper data rate for a variable data rate signal, the integrated circuit comprising in combination: a buffer for queuing a first number of first partial symbols constructed from the variable data rate signal; a comparator for first comparing a characteristic of said first number of said first partial symbols to a first threshold to provide a first comparison, said first threshold corresponding to said first number, said first number less than all first partial symbols in a frame, said comparator further for second comparing said characteristic of said first number of said first partial symbols to a second threshold to provide a second comparison, said second threshold corresponding to said first number; said buffer providing the first partial symbols as symbols for further processing the variable data rate signal at a first data rate when said first comparison is favorable; and a combiner for combining said first partial symbols to provide second partial symbols at a second data rate that is less than said first data rate when said second comparison is favorable. 13. The integrated circuit of claim 12 further including a calculator, coupled to the buffer and the comparator, for computing said characteristic and said first threshold and said second threshold. 14. The integrated circuit of claim 13 further including a controller coupled to the comparator for controlling said calculator, said combiner, said buffer, and a despreader such that the integrated circuit determines the upper data rate. 15. The integrated circuit of claim 14 wherein said despreader and said buffer, when said first comparison and said second comparison are not favorable, operate to increase said first number to a second number of said first partial symbols and said calculator, said comparator, and said combiner repeat said computing, said first comparing, said second comparing, said providing, and said combining operations. 16. The integrated circuit of claim 14 further including, when said second comparison is favorable, repeating the operations of claim 14 under control of the controller as follows: said calculator computing a characteristic of a second number of said second partial symbols constructed from the variable data rate signal and a third threshold and a fourth threshold, each corresponding to said second number; said comparator comparing said characteristic to said third threshold to provide a third comparison and said comparator further comparing said characteristic to said fourth threshold to provide a fourth comparison; said buffer providing said second partial symbols as symbols for further processing the variable data rate signal at said second data rate when said third comparison is favorable; and said combiner combining said second partial symbols to provide third partial symbols at a third data rate that is less than said second data rate when said fourth comparison is favorable. 17. The integrated circuit of claim 12 wherein said comparator comparing said characteristic further includes comparing a characteristic that is proportional to an energy of said first number of said first partial symbols. 18. The integrated circuit of claim 12 wherein said comparator first comparing said characteristic to said first threshold further includes comparing said characteristic to a threshold that confirms that the variable data rate signal includes said first data rate to a predetermined confidence level. 19. The integrated circuit of claim 18 wherein said threshold corresponds to an expected mean for said first number of said first partial symbols plus a predetermined number of standard deviations when the variable data rate signal does not include said first data rate so that when said characteristic exceeds said threshold said first comparison is favorable implying said first data rate is present with a confidence level corresponding to said predetermined number of said standard deviations. 20. The integrated circuit of claim 12 wherein said comparator second comparing said characteristic to said second threshold further includes comparing said characteristic to a threshold that confirms that the variable data rate signal does not include said first data rate to a predetermined confidence level. 21. The integrated circuit of claim 20 wherein said threshold corresponds to an expected mean for said first number of said fast partial symbols less a predetermined number of standard deviations when the variable data rate signal includes said first data rate so that when said characteristic is less than said threshold said second comparison is favorable implying said first date data rate is not present with a confidence level corresponding to said predetermined number of said standard deviations. 22. The integrated circuit of claim 12 wherein said first comparing said characteristic further includes comparing a characteristic that is proportional to one of a sum of squared linear combinations of said first number of said first partial symbols and a channel estimate corresponding to said first number of said first partial symbols. 23. The integrated circuit of claim 12 wherein the variable data rate signal is a Code Division Multiple Access signal having variable data rates. 24. The integrated circuit of claim 12 wherein said first data rate is the highest possible data rate for the variable data rate signal. 25. A receiver arranged and constructed to determine an upper data rate for a variable data rate signal, the receiver comprising in combination: a front end for down converting a radio frequency signal to a base band signal with an unknown data rate; a buffer for queuing a first number of first partial symbols constructed from the variable data rate signal, said first number less than all first partial symbols in a frame; a comparator for first comparing a characteristic of said first number of said first partial symbols to a first threshold to provide a first comparison, said first threshold corresponding to said first number, said comparator further for second comparing said characteristic of said first number of said first partial symbols to a second threshold to provide a second comparison, said second threshold corresponding to said first number; said buffer providing the first partial symbols as symbols for further processing the variable data rate signal at a first data rate when said first comparison is favorable; and a combiner for combining said first partial symbols to provide second partial symbols at a second data rate that is less than said first data rate when said second comparison is favorable. 26. The receiver of claim 25 further including a calculator, coupled to the buffer and the comparator, for computing said characteristic and said first threshold and said second threshold. 27. The receiver of claim 26 further including a controller coupled to the comparator for controlling said calculator, said combiner, said buffer, and a despreader such that the receiver determines the upper data rate. 28. The receiver of claim 27 wherein said despreader and said buffer, when said first comparison and said second comparison are not favorable, operate to increase said first number to a second number of said first partial symbols and said calculator, said comparator, and said combiner repeat said computing, said first comparing, said second comparing, said providing, and said combining operations. 29. A software program that when installed and operating on a programmable integrated circuit will result in the integrated circuit facilitating determination of an upper data rate for a variable data rate signal, the program including instructions that perform a method including the following steps: first comparing a characteristic of a first number of first partial symbols constructed from the variable data rate signal to a first threshold to provide a first comparison, said first threshold corresponding to said first number, said first number less than all first partial symbols in a frame; processing the variable data rate signal at a first data rate when said first comparison is favorable; second comparing said characteristic of said first number of said first partial symbols to a second threshold to provide a second comparison, said second threshold corresponding to said first number; and combining said first partial symbols to provide second partial symbols at a second data rate that is less than said first data rate when said second comparison is favorable. 30. The software program of claim 29 wherein the method further includes, when said first comparison and said second comparison are not favorable, a step of increasing said first number to a second number of said first partial symbols and repeating said first comparing, said processing, said second comparing, and said combining steps until a data rate for the variable data rate signal has been determined.