IPC분류정보
| 국가/구분 |
United States(US) Patent
등록
|
| 국제특허분류(IPC7판) |
|
| 출원번호 |
US-0949783
(2004-09-23)
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| 우선권정보 |
DE-198 26 458(1998-06-13) |
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발명자
/ 주소 |
- Karwath,Arno
- Hornberger,J철rg
- Jeske,Frank
- Rappenecker,Hermann
- Kaltenbrunner,Hansj철rg
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| 출원인 / 주소 |
- ebm papst St. Georgen GmbH&
- Co.KG
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| 대리인 / 주소 |
Ware, Fressola, Van Der Sluys &
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| 인용정보 |
피인용 횟수 :
8 인용 특허 :
51 |
초록
▼
An arrangement having an electric motor (10) has a microcontroller (12) for influencing at least one motor function and a nonvolatile storage element (14) for storing at least one variable as a definition for that motor function. The arrangement also has an interface (13a) for a data line (13) for t
An arrangement having an electric motor (10) has a microcontroller (12) for influencing at least one motor function and a nonvolatile storage element (14) for storing at least one variable as a definition for that motor function. The arrangement also has an interface (13a) for a data line (13) for transferring the at least one variable, in particular a current limiting value (Iref) from or to a storage element (14) by way of the microcontroller (12), and optionally by way of an internal data bus (15). The invention also relates to use of the device in the context of batteries of fans, and program-controlled current limitation for startup of an electric motor (10).
대표청구항
▼
The invention claimed is: 1. An arrangement comprising an electric motor (10; 10'), and a microprocessor (12), for influencing at least one motor function, having a terminal (A, A'), wherein an output level on said terminal (A, A') of the microprocessor (12) is switchable by program-controlled swit
The invention claimed is: 1. An arrangement comprising an electric motor (10; 10'), and a microprocessor (12), for influencing at least one motor function, having a terminal (A, A'), wherein an output level on said terminal (A, A') of the microprocessor (12) is switchable by program-controlled switching operations within said microprocessor between a high level and a low level; and further comprising a first voltage divider (20, 22) having two terminals connected, in operation, to two different predefined potentials and having a tapping point (18) thereof connected to said microprocessor terminal (A, A') via a resistor ( 17), in order to make the potential at that voltage divider tapping point (18) switchable between at least two values by program-controlled switching of said level on said terminal, and by switching said potential at said tapping point, to influence a parameter of the motor (10; 10'). 2. The arrangement as defined in claim 1, wherein the parameter is a current limiting value (Iref) for limiting motor current (i) of the electric motor (10; 10'). 3. The arrangement as defined in claim 1, wherein said resistor (17) is of high-resistance configuration. 4. The arrangement as defined in claim 3, wherein the value of said resistor (17) is not less than 50 kilohm. 5. The arrangement as defined in claim 1, wherein the output at said terminal (A) of the microprocessor ( 12) is switchable in program-controlled fashion to a third, high-resistance, state. 6. The arrangement as defined in claim 1, wherein said first voltage divider has branches and there is provided, parallel to one branch (22) of the first voltage divider ( 20, 22), a second voltage divider (160) having a tapping point (163), the potential at the latter tapping point (163) influencing the parameter of the motor (10; 10'). 7. The arrangement as defined in claim 6, wherein the second voltage divider (160) has a higher resistance as compared to the resistance value of the branch (22) of the first voltage divider (20, 22) to which it is connected in parallel. 8. The arrangement as defined in claim 6, wherein the voltage division ratio of the second voltage divider ( 60) is designed so that, when the potential at its tapping point ( 163) is used as a comparison potential, the result is a low value for that comparison potential. 9. The arrangement as defined in claim 6, wherein the potential at the tapping point (163) of the second voltage divider (160) defines a current limiting value (Iref) for limiting the motor current (i) of the electric motor (10; 10 '). 10. The arrangement as defined in claim 2, comprising a nonvolatile memory element (14) serving to store at least one time value (Ts) after whose expiration a switchover of said output (A) of the microprocessor (12) is accomplished in program-controlled fashion. 11. An arrangement for carrying out program-controlled adjustment of limitation of current, passing through windings of a motor controlled by an associated microprocessor (12), wherein the microprocessor (12), for program-controlled switchover of a current limiting value (Iref), comprises at least one terminal (A) whose output signal level is switchable, by program-controlled switching operations within said microprocessor, at least between a high and a low signal level and thereby influences the current limiting value (Iref); further comprising a first voltage divider (20, 22) having two terminals connected, in operation, to two different potentials and having a tapping point (18) thereof connected to said microprocessor terminal (A) via a resistor, the potential at said tapping point serving, in operation, to influence said current limiting value (Iref); and wherein said output signal level is modifiable in program-controlled fashion during startup of the motor (10; 10'). 12. The arrangement as defined in claim 11, wherein the at least one output (A) is switchable to a high-resistance state called the tristate state. 13. The arrangement as defined in claim 11, wherein the potential at said tapping point (18) serves for comparison with a voltage (u) at a measurement resistor (36) through which the motor current (i) flows; and wherein the motor current (i) is interrupted when that voltage (u) reaches a predefined ratio with respect to that potential. 14. The arrangement as defined in claim 11, wherein there is provided, parallel to one branch (22) of the first voltage divider (20, 22), a second voltage divider (160) having a tapping point (163), the potential at the latter tapping point ( 163) serving for comparison with a voltage (u) at a measurement resistor (36) through which the motor current (i) flows; and wherein the motor current (i) is interrupted when that voltage (u) reaches a predefined ratio with respect to that potential at the latter tapping point (163). 15. The arrangement as defined in claim 14, further comprising a comparator (28), serving to make a comparison with a voltage (u) at a measurement resistor (36) through which the motor current (i) flows. 16. The arrangement as defined in claim 14, wherein the second voltage divider (160) has a higher resistance as compared to the branch (22) of the first voltage divider (20, 22) to which it is connected in parallel. 17. The arrangement as defined in claim 14, wherein a voltage division ratio of the second voltage divider ( 60) is so chosen that, when the potential at its tapping point ( 163) is used as a comparison potential, the result is a low value for that comparison potential. 18. The arrangement as defined in claim 15, wherein the voltage (u) at the measurement resistor (36) is filtered by a low-pass filter (38, 42) before comparison with the aforesaid comparison potential. 19. The arrangement as defined in claim 18, wherein the low-pass filter is configured as a first-order low-pass filter (38, 42). 20. The arrangement according to claim 1, further comprising a data line (13) for connection to a data source, and wherein the microprocessor (12) comprises a predefined memory element (332) for storing an address conveyed via the data line (13), an arrangement (14, 330) for storing an address (324) of the arrangement to be addressed, and a comparator for comparing those two addresses. 21. The arrangement according to claim 1, further comprising a directory (280) for storing an object to be transferred via a data line, said obiect having at least one characteristic, and further having a memory element (332), for storing a variable characterizing said object said memory element being associated with the microprocessor (12) so that by using that variable, at least one characteristic ( 286, 288, 290) of that object can be retrieved, for processing thereof, from said directory (280). 22. The arrangement as defined in claim 21, wherein the characteristic is the length (286) of that object. 23. The arrangement as defined in claim 21, wherein the characteristic is the hardware address (288, 290) of that object. 24. The arrangement as defined in claim 9, comprising a nonvolatile memory element (14) serving to store at least one time value (Ts) after whose expiration a switchover of the output level at said output (A) of the microprocessor (12) is accomplished in program-controlled fashion.
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