초록 ▼

A probe card has first contact terminals electrically connected to the fine-pitch electrodes of a test target; wirings drawn from the first contact terminals; and second contact terminals electrically connected to the wirings, wherein the first contact terminals are formed each using an anisotropica

A probe card has first contact terminals electrically connected to the fine-pitch electrodes of a test target; wirings drawn from the first contact terminals; and second contact terminals electrically connected to the wirings, wherein the first contact terminals are formed each using an anisotropically etched hole in a crystalline substrate, and a semiconductor device test method (fabrication method) using the probe card.

대표청구항 ▼

What is claimed is: 1. A probe sheet comprising: contact terminals arranged in a first surface of the probe sheet to oppose a wafer part to contact with electrodes provided on the wafer part; wirings, each being drawn from one of the contact terminals in the probe sheet; and electrode pads, each be

What is claimed is: 1. A probe sheet comprising: contact terminals arranged in a first surface of the probe sheet to oppose a wafer part to contact with electrodes provided on the wafer part; wirings, each being drawn from one of the contact terminals in the probe sheet; and electrode pads, each being arranged in a second surface of the probe sheet at an opposite side thereof to the first surface and electrically connected to one of the wirings, wherein a pitch between each adjacent electrode pads of the electrode pads in the second surface of the probe sheet is wider than a pitch between each corresponding adjacent contact terminals of the contact terminals in the first surface thereof, and wherein each of the contact terminals is supported by polymide. 2. A probe sheet according to claim 1, wherein the contact terminals are arranged according to an array of peripheral electrodes of semiconductor devices formed on the wafer part, and wherein the electrode pads are arranged in a grid pattern. 3. A probe sheet according to claim 1, wherein a metallic sheet, from which at least a part corresponding to signal electrode pads of the electrode pads is removed, is provided on the second surface of the probe sheet. 4. A probe sheet according to claim 3, wherein a linear expansion coefficient of the metallic sheet is equal to a linear expansion coefficient of the wafer part. 5. A probe sheet according to claim 3, wherein the metallic sheet is a 42 alloy sheet. 6. A probe sheet according to claim 1, wherein dummy terminals, each of which has a larger contact area with the wafer part than that of each of the contact terminals, are provided on the first surface of the probe sheet on which the contact terminals are provided. 7. A probe sheet according to claim 1, wherein the contact terminals are each created by using an anisotropically etched hole in a crystalline substrate as a cast. 8. A probe card comprising: a probe sheet having contact terminals being arranged in a first surface of the probe sheet to oppose a wafer part to contact with electrodes provided on the wafer part, wirings each being drawn from one of the contact terminals, and electrode pads each being arranged in a second surface of the probe sheet at an opposite side thereof to the first surface and electrically connected to one of the wirings; and a multi-layer wiring substrate being provided at an opposite side of the probe sheet to the wafer part to face the second surface thereof, the multi-layer wiring substrate has electrodes each being electrically connected to one of the contact terminals through the one of the electrode pads and formed on a surface of the multi-layer wiring substrate, and wherein a pitch between each adjacent electrode pads of the electrode pads in the second surface of the probe sheet is wider than a pitch between each corresponding adjacent contact terminals of the contact terminals in the first surface thereof, and wherein each of the contact terminals are supported by polyimide. 9. A probe card according to claim 8, wherein the contact terminals of the probe sheet are arranged according to an array of peripheral electrodes of semiconductor devices formed on the surface of the wafer part, and wherein the electrodes of the multi-layer wiring substrate are arranged in a grid pattern in the surface thereof. 10. A probe card according to claim 8, wherein the electrodes of the multi-layer wiring substrate are provided in a device-opposed-area on the surface of the multi-layer wiring substrate. 11. A probe card according to claim 10, wherein the device-opposed atea is an atea of the multi-layer wiring substrate opposite to semiconductor devices formed on the surface of the wafer part across the probe sheet. 12. A probe card according to claim 8, wherein at least one of capacitors, resistors or fuses are mounted in a device-opposed area on the multi-layer wiring substrate. 13. A probe card according to claim 12, wherein the device-opposed area is an area of the multi-layer wiring substrate opposite to semiconductor devices formed on the surface of the wafer part across the probe sheet, and that at least one of capacitors, resistors or fuses are mounted on a surface of the multi-layer wiring substrate at an opposite side thereof to the wafer part. 14. A probe card according to claim 8, wherein the electrode pads arranged in the second surface of the probe sheet and the electrodes of the multi-layer wiring substrate are electrically connected by a connection part extended vertically with respect the multi-layer wiring substrate. 15. A probe card according to claim 8, wherein the electrodes of the multi-layer wiring substrate are electrically connected to the electrode pads arranged in the second surface of the probe sheet via spring probes disposed therebetween. 16. A probe card according to claim 15, wherein the spring probes are removable. 17. A probe card according to claim 8, wherein each of the electrodes of the multi-layer wiring substrate and each of the electrode pads arranged in the second surface of the probe sheet are electrically connected to each other via a wire extended therebetween. 18. A probe card according to claim 8, wherein the probe card is provided with a heating element having a temperature adjustment function. 19. A probe card according to claim 8, wherein the contact terminals are each a pyramid-shaped or truncated-pyramid-shaped terminal created by using an anisotropically etched hole in a crystalline substrate as a cast. 20. A semiconductor test equipment comprising: a stage on which a wafer part is mounted; and a probe card having contact terminals that get in contact with electrodes of semiconductor devices formed on the wafer part and electrically connected to a tester that tests electrical characteristics of the semiconductor devices, wherein the probe card comprises: a probe sheet having the contact terminals being arranged in a first surface of the probe sheet opposite to the water part, wirings each being drawn from one of the contact terminals, and electrode pads each being arranged in a second surface of the probe sheet at an opposite side thereof to the first surface and electrically connection to one of the wirings; and a multi-layer wiring substrate whose electrodes electrically connected to the contact terminals via the electrode pads respectively are provided on a surface opposed to the wafer part across the probe sheet, and wherein a pitch between each adjacent electrode pads of the electrode pads in the second surface of the probe sheet is wider than a pitch between each corresponding adjacent contact terminals of the contact terminals in the first surface thereof, and wherein each of the contact terminals is supported by polyimide. 21. A semiconductor test equipment according to claim 20, wherein a temperature of the stage is controlled by a heater being provided to the stage and a temperature of the probe card is controlled by a heating element being provided to the probe card. 22. A semiconductor test equipment according to claim 20, wherein the contact terminals are each a pyramid-shaped or truncated-pyramid-shaped terminal created with an anisotropically etched hole in a crystalline substrate as a shape former. 23. A probe sheet comprising: contact terminals arranged in a first surface of the probe sheet to oppose a wafer part to contact with electrodes provided on the wafer part; wirings, each being drawn from one of the contact terminals in the probe sheet; and electrode pads, each being arranged in a second surface of the probe sheet at an opposite side thereof to the first surface and electrically connected to one of the wirings, wherein a pitch between each adjacent electrode pads of the electrode pads in the second surface of the probe sheet is wider than a pitch between each corresponding adjacent contact terminals of the contact terminals in the first surface thereof, and wherein ones of the electrode pads extending in a direction away from an area of the contact terminals are laid out in an array having at least three rows extending at least somewhat parallel to the area, and wherein each of the contact terminals is supported by polyimide. 24. A probe sheet as claimed in claim 23, wherein the electrode pads of a subject row of the rows, are staggered with respect to the electrode pads of a neighboring row. 25. A probe sheet as claimed in claim 23, wherein the wirings are serpentine wirings, and ones of the serpentine wirings trace serpentine paths between the electrode pads. 26. A probe sheet as claimed in claim 25, wherein a pitch between ones of the serpentine wirings varies extending in the direction away from the area of the contact terminals.