[특허]Semiconductor multi-package module having package stacked over die-down flip chip ball grid array package and having wire bond interconnect between stacked packages

[미국특허] Semiconductor multi-package module having package stacked over die-down flip chip ball grid array package and having wire bond interconnect between stacked packages 원문보기

IPC분류정보
국가/구분	United States(US) Patent 등록
국제특허분류(IPC7판)	H01L-023/02
출원번호	US-0632553 (2003-08-02)
발명자 / 주소	Karnezos,Marcos
출원인 / 주소	ChipPAC, Inc.
대리인 / 주소	Haynes Beffel &
인용정보	피인용 횟수 : 56 인용 특허 : 40

초록 ▼

A semiconductor multi-package module having stacked second and first packages, each package including a die attached to a substrate, in which the first and second package substrates are interconnected by wire bonding, and in which the first package is a flip chip ball grid array package in a die-down configuration. Also, a method for making a semiconductor multi-package module, by providing a first package including a first package substrate and having a die-down flip chip configuration, affixing a second package including a second package substrate an upper surface of the first package, and forming z-interconnects between the first and second package substrates.

대표청구항 ▼

I claim: 1. A multi-package module comprising stacked first and second packages, the first package including a die attached to and electrically connected to a first substrate, and the second package including a die attached to and electrically connected to a second substrate, wherein the first and second substrates are interconnected by wire bonding, wherein the first package comprises a flip-chip ball grid array package having a flip-chip in a die-down configuration, and wherein the second package is encapsulated with a package encapsulation, the module further comprising second-level interconnections solder ball pads at the lower side of the lower package substrate. 2. The multi-package module of claim 1 wherein the second package is a wire bonded land grid array package. 3. The multi-package module of claim 2 wherein the die and wire bonds in the second package are fully encapsulated with a molding material. 4. The multi-package module of claim 2 wherein the second package is peripherally encapsulated to an extent sufficient to cover the wire bonds between the die and the substrate. 5. The multi-package module of claim 2 wherein the second package substrate is a single-metal layer substrate. 6. The multi-package module of claim 1 wherein the electrical shield is configured to serve as a heat spreader. 7. The multi-package module of claim 1 wherein the flip chip package includes an RF die. 8. The multi-package module of claim 1 wherein the flip chip package includes an RF die, and the shield serves to limit electromagnetic interference between the RF die and other die in the multi-package module. 9. The multi-package module of claim 1 wherein the first package is provided with an electrical shield. 10. The multi-package module of claim 1 wherein the second package is a stacked die package. 11. The multi-package module of claim 10 wherein adjacent stacked die in the stacked die package are separated by spacers. 12. The multi-package module of claim 1 wherein the second package is stacked over the first package, and wherein the flip-chip die on the first package is provided with an electrical shield. 13. The multi-package module of claim 1 wherein the first package substrate includes an embedded ground plane. 14. The multi-package module of claim 13, the ground plane being configured to serve for heat dissipation. 15. The multi-package module of claim 13, the ground plane being configured to serve as an electrical shield. 16. The multi-package module of claim 1 wherein at least one of the first and the second package is a stacked-die package. 17. The multi-package module of claim 1 wherein the second package is a stacked-die package. 18. The multi-package module of claim 1, further comprising a heat shield. 19. A mobile communications device comprising a multi-package module according to claim 1. 20. A computer comprising a multi-package module according to claim 1.

이 특허에 인용된 특허 (40) 인용/피인용 타임라인 분석

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[미국특허] Semiconductor multi-package module having package stacked over die-down flip chip ball grid array package and having wire bond interconnect between stacked packages 원문보기

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[미국특허] Semiconductor multi-package module having package stacked over die-down flip chip ball grid array package and having wire bond interconnect between stacked packages 원문보기

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