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Method and system for using idle threads to adaptively throttle a computer 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-001/26
출원번호 US-0882076 (2001-06-15)
발명자 / 주소
  • Plante,Stephane G.
  • Vert,John D.
  • Oshins,Jacob
출원인 / 주소
  • Microsoft Corporation
대리인 / 주소
    Merchant &
인용정보 피인용 횟수 : 30  인용 특허 : 16

초록

A method and system for adaptively throttling a computer is provided. Prior CPU utilization is calculated when a CPU enters an idle state. If the prior CPU utilization warrants a change in the CPU performance level, an appropriate CPU performance level is calculated. Policies, including thermal pol

대표청구항

We claim: 1. A computer-implemented method for adaptively throttling a computer, comprising: measuring a prior utilization of the computer while a CPU of the computer is idle, wherein the prior utilization is measured by resolving user time, kernel time, and idle time within a time period into a ut

이 특허에 인용된 특허 (16)

  1. Shaffer Shmuel ; Beyda William J. ; Gold Cheryl, Apparatus and method for automatic CPU speed control based on application-specific criteria.
  2. Shaffer Shmuel ; Beyda William J., Apparatus and method for preventing network rerouting.
  3. Maitra Amit K. (Hillsboro OR), Application specific clock throttling.
  4. Bland Patrick M. (Delray Beach FL) Jackson Robert T. (Boyhton Beach FL) Joshi Jayesh (Santa Clara CA) Kardach James (San Jose CA), CPU clock control unit.
  5. Cooper, Barnes; Arjangrad, Jay, CPU power management based on utilization with lowest performance mode at the mid-utilization range.
  6. Menezes, Evandro; Tobias, David F.; Russell, Richard; Altmejd, Morrie, CPU utilization measurement techniques for use in power management.
  7. Kung, Shao-Tsu; Cheng, Chih-Chuan; Liu, Chun-Chih; Chen, Yi-Chang, Dynamic power saving by monitoring CPU utilization.
  8. Tymchenko Viktor A., Method and apparatus for selecting an optimal system bus clock in a highly scalable computer system.
  9. Fruehling, Terry L.; Helm, Troy L.; Waidner, John, Method and circuit for analysis of the operation of a microcontroller using signature analysis of memory.
  10. Tung Chung-Chih TW, Method and system for dynamically controlling the operation speed of a processor.
  11. Thomas C. Douglass ; Thomas Alan E., Method and system for performing thermal and power management for a computer.
  12. Dai, Xia, Method, apparatus, and machine-readable medium to enhance microprocessor performance.
  13. Mittal Millind ; Valentine Robert,ILX, Performance throttling to reduce IC power consumption.
  14. Spell David ; Roland Dave ; Rai Ajay ; Ellis Dale ; Mikami Yukihiro,JPX, Predictive bandwidth allocation method and apparatus.
  15. Evoy David R., System for reducing the power consumption of a computer system and method therefor.
  16. Barnes Cooper, Thermal control within systems having multiple CPU performance states.

이 특허를 인용한 특허 (30)

  1. Yamamura, Shuji; Kumon, Kouichi, Accounting apparatus and method for SMT processor.
  2. Kim, Tae-Jin; Park, Jung-Hun; Park, Hyuk-Chan; Lee, Ho-Seung; Lee, Kang-Min, Apparatus and method for a power control in a system using an embedded CPU.
  3. Rozen, Anton; Bobrov, Boris; Priel, Michael, Apparatus and method for controlling voltage and frequency.
  4. Jones, Darren M., Apparatus and method for software specified power management performance using low power virtual threads.
  5. Ziarnik, Gregory P.; Tupa, Mark D., Computer system with a fan and a temperature monitoring unit.
  6. Arakawa,Fumio, Data processing device and semiconductor device.
  7. Vasquez, Steven R., Disk drive configuring power mode of disk drive relative to servo gate.
  8. Prabhakaran, Rajeev; Patel, Jagrut Viliskumar; Choe, Martin (Vyungchon); Parrington, Kyle, Dynamic clock frequency adjustment based on processor load.
  9. Stemen, Patrick L.; Judge, Nicholas S.; Brown, Tristan A.; DeWhitt, Dean L., Idle time service.
  10. Stemen, Patrick L.; Judge, Nicholas S.; Brown, Tristan A.; DeWhitt, Dean L., Idle time service.
  11. Samson, Eric C.; Horigan, John William; Jackson, Robert T.; Thakkar, Ticky, Method and apparatus for external processor thermal control.
  12. Rozen, Anton; Mostinski, Roman; Priel, Michael, Method for controlling a frequency of a clock signal to control power consumption and a device having power consumption capabilities.
  13. Meyer, Alan T.; Coker, Kenny T., Method for increasing a processor operating frequency when other subsystem demands are low.
  14. Igakura, Tomohiro, Policy processing system, method, and program.
  15. Wyatt,David; Saunders,Bradley N., Policy table rule based processor side bus signaling.
  16. Rychlik, Bohuslav; Iranli, Ali; Salsbery, Brian J.; Sur, Sumit; Thomson, Steven S.; Glenn, Robert A., System and method for asynchronously and independently controlling core clocks in a multicore central processing unit.
  17. Kuranuki,Masaaki, System and method for controlling a clock oscillator and power supply voltage based on the energy consumed for processing a predetermined amount of data.
  18. Rychlik, Bohuslav; Glenn, Robert A.; Iranli, Ali; Salsbery, Brian J.; Sur, Sumit; Thomson, Steven S., System and method for controlling central processing unit power based on inferred workload parallelism.
  19. Rychlik, Bohuslav; Iranli, Ali; Salsbery, Brian J.; Sur, Sumit; Thomson, Steven S., System and method for controlling central processing unit power in a virtualized system.
  20. Thomson, Steven S.; Rychlik, Bohuslav; Iranli, Ali; Sur, Sumit; Gargash, Norman S., System and method for controlling central processing unit power with guaranteed transient deadlines.
  21. Thomson, Steven S.; Rychlik, Bohuslav; Iranli, Ali; Sur, Sumit; Gargash, Norman S., System and method for controlling central processing unit power with guaranteed transient deadlines.
  22. Thomson, Steven S.; Rychlik, Bohuslav; Iranli, Ali; Sur, Sumit; Gargash, Norman Scott, System and method for controlling central processing unit power with guaranteed transient deadlines.
  23. Thomson, Steven S.; Rychlik, Bohuslav; Iranli, Ali; Salsbery, Brian J.; Sur, Sumit; Gargash, Norman S., System and method for controlling central processing unit power with reduced frequency oscillations.
  24. Sur, Sumit; Rychlik, Bohuslav; Thomson, Steven S.; Iranli, Ali; Salsbery, Brian J., System and method for dynamically controlling a plurality of cores in a multicore central processing unit based on tempature.
  25. Sur, Sumit; Rychlik, Bohuslav; Thomson, Steven S.; Iranli, Ali; Salsbery, Brian J., System and method for dynamically controlling a plurality of cores in a multicore central processing unit based on temperature.
  26. Bose,Pradip; Rivers,Jude A.; Srinivasan,Jayanth, System and method of workload-dependent reliability projection and monitoring for microprocessor chips and systems.
  27. Monasterio, Michael, Systems and methods for CPU throttling utilizing processes.
  28. Huang, Cheng Wei; Hsu, Chia Ming; Lin, Hao Lin; Huang, Wen Juin, Thermal throttling duty estimation methods and systems for a CPU.
  29. Quillen, Kevin S.; Olds, Edwin S.; Kastler, Danny J., User controlled data storage device power and performance settings.
  30. Osipov, Kirill M.; VanderWiele, Mark W., Utilizing a profile to prevent recurring events from being transmitted to the event processing device that are not necessary to be processed by event processing device.
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