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[미국특허] Probe card assembly 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G01R-031/02
출원번호 US-0889334 (2004-07-12)
발명자 / 주소
  • Khandros,Igor Y.
  • Sporck,A. Nicholas
  • Eldridge,Benjamin N.
출원인 / 주소
  • FormFactor, Inc.
인용정보 피인용 횟수 : 15  인용 특허 : 68

초록

In a probe card assembly, a series of probe elements can be arrayed on a silicon space transformer. The silicon space transformer can be fabricated with an array of primary contacts in a very tight pitch, comparable to the pitch of a semiconductor device. One preferred primary contact is a resilient

대표청구항

What is claimed is: 1. A probe assembly comprising: a wiring board comprising a plurality of contact terminals; a semiconductor substrate comprising a plurality of first substrate terminals and a plurality of second substrate terminals, wherein ones of said first substrate terminals are electrical

이 특허에 인용된 특허 (68) 인용/피인용 타임라인 분석

  1. Pasiecznik ; Jr. John (Malibu CA), Active circuit multi-port membrane probe for full wafer testing.
  2. D\Souza Daniel B. (Santa Clara County CA), Active probe card.
  3. Buol Douglas A. (Dallas TX) Mize Dean N. (Garland TX) Pattschull John W. (Garland TX) Wallace Robert M. (Dallas TX), Apparatus for testing integrated circuits.
  4. Yojima Masayuki,JPX ; Tsujide Tohru,JPX ; Nakaizumi Kazuo,JPX, Apparatus for testing semiconductor wafer.
  5. Pedder David John,GBX, Bare die testing.
  6. Hubacher Eric M. (Austin TX), Bumped semiconductor device and method for probing the same.
  7. Chang Sung Chul ; Khandros Igor Y. ; Smith William D., Chip-scale carrier for semiconductor devices including mounted spring contacts.
  8. Okubo Masao (Tokyo JPX) Yoshimitsu Yasuro (Tokyo JPX), Complex probe card for testing a semiconductor wafer.
  9. Khandros Igor Y. ; Mathieu Gaetan L., Composite interconnection element for microelectronic components, and method of making same.
  10. Legal Dennis Andrew, Configurable probe card for automatic test equipment.
  11. Fjelstad Joseph C., Connection components with posts.
  12. Beaman Brian S. (Hyde Park NY) Fogel Keith E. (Bardonia NY) Kim Jungihl (Chappaqua NY) Mayr Wolfgang (Poughkeepsie NY) Shaw Jane M. (Ridgefield CT) Walker George F. (New York NY), Connector assembly for chip testing.
  13. Khandros Igor Y. ; Eldridge Benjamin N. ; Mathieu Gaetan L. ; Dozier Thomas H. ; Smith William D., Contact carriers (tiles) for populating larger substrates with spring contacts.
  14. Akram Salman ; Wark James M. ; Farnworth Warren M., Direct connect interconnect for testing semiconductor dice and wafers.
  15. Crowley Richard N. (Aloha OR), Driven guard probe card.
  16. Kister January, Dual contact probe assembly for testing integrated circuits.
  17. Mendenhall David W. (Greenville RI) Goff Jay T. (Cranston RI), Flex dot wafer probe.
  18. Khandros Igor Y. ; Mathieu Gaetan L., Flexible contact structure with an electrically conductive shell.
  19. Kwon Oh-Kyong (Plano TX) Hashimoto Masashi (Garland TX) Malhi Satwinder (Garland TX) Born Eng C. (Richardson TX), Full wafer integrated circuit testing device.
  20. Bross Arthur (Poughkeepsie NY) Walsh Thomas J. (Poughkeepsie NY), High density probe.
  21. Whann Welton B. (San Diego CA) Elizondo Paul M. (Escondido CA), High density probe card.
  22. Subramanian Eswar (Phoenix AZ), High density probe card for testing electrical circuits.
  23. Ardezzone Frank J. (Santa Clara CA), High density probe-head with isolated and shielded transmission lines.
  24. Bove Ronald (Wappingers Falls NY) Hubacher Eric M. (Wappingers Falls NY), High density wafer contacting and test system.
  25. Jones Mark R. ; Khoury Theodore A., High performance integrated circuit chip package.
  26. Kwon On-Kyong (Plano TX) Hashimoto Masashi (Garland TX) Malhi Satwinder (Garland TX), High performance test head and method of making.
  27. Perry Charles H. (Poughkeepsie NY) Bauer Tibor L. (Hopewell Junction NY) Long David C. (Wappingers Falls NY) Pickering Bruce C. (Wappingers Falls NY) Vittori Pierre C. (Cold Spring NY), Interface card for a probe card assembly.
  28. Lee Shaw Wei (10410 Miller Ave. Cupertino CA 95014), Known good die test apparatus and method.
  29. Kister January (Palo Alto CA), Large scale protrusion membrane for semiconductor devices under test with very high pin counts.
  30. Schwindt Randy J., Low-current probe card with reduced triboelectric current generating cables.
  31. Leedy Glenn J. (1061 E. Mountain Dr. Santa Barbara CA 93108), Making and testing an integrated circuit using high density probe points.
  32. Crumly William R. (Anaheim CA), Membrane connector with stretch induced micro scrub.
  33. Crumly William R. (Anaheim CA), Membrane connector with stretch induced micro scrub.
  34. Hsue Ching-Wen (Lawrenceville NJ) Lee Wha-Joon (Lawrenceville NJ), Method and apparatus for verifying the continuity between a circuit board and a test fixture.
  35. Palagonia Anthony Michael, Method for forming an interposer for making temporary contact with pads of a semiconductor chip.
  36. DeHaven Robert Keith (Austin TX) Wenzel James F. (Austin TX), Method for manufacturing a stimulus wafer for use in a wafer-to-wafer testing system to test integrated circuits located.
  37. Lum Thomas F. (Austin TX) Wenzel James F. (Austin TX), Method for probing a semiconductor wafer.
  38. Eldridge Benjamin N. ; Khandros Igor Y. ; Mathieu Gaetan L. ; Pedersen David V., Method of making microelectronic spring contact elements.
  39. Khandros Igor Y. (Peekskil NY), Method of manufacturing electrical contacts, using a sacrificial member.
  40. Eldridge Benjamin N. ; Grube Gary W. ; Khandros Igor Y ; Mathieu Gaetan L., Method of modifying the thickness of a plating on a member by creating a temperature gradient on the member, applications for employing such a method, and structures resulting from such a method.
  41. Eldridge Benjamin N. ; Grube Gary W. ; Khandros Igor Y. ; Mathieu Gaetan L., Method of mounting resilient contact structures to semiconductor devices.
  42. Eldridge Benjamin N. ; Grube Gary W. ; Khandros Igor Y. ; Mathieu Gaetan L., Method of planarizing tips of probe elements of a probe card assembly.
  43. Watanabe Takashi,JPX ; Yoshida Minako,JPX, Method of producing micro contact structure and contact probe using same.
  44. Palagonia Anthony Michael ; Pikna Paul Joseph ; Maddix John Thomas, Micro probe assembly and method of fabrication.
  45. Swapp Mavin (Mesa AZ), Micromachined semiconductor probe card.
  46. Takayama Yoshinari,JPX ; Baba Toshikazu,JPX ; Hino Atsushi,JPX ; Amino Ichiro,JPX, Multilayer probe for measuring electrical characteristics.
  47. Jones Mark R. ; Khoury Theodore A., Packaging and interconnection of contact structure.
  48. Driller Hubert (Schmitten DEX) Mang Paul (Schmitten DEX), Printed circuit board testing device with foil adapter.
  49. Higgins H. Dan ; Martinez Martin A. ; Bates R. Dennis, Probe assembly and method for switchable multi-DUT testing of integrated circuit wafers.
  50. Higgins H. Dan (323 E. Redfield Chandler AZ 85225), Probe card apparatus.
  51. Carlin Scott J. (Austin TX) Roberts ; Jr. Samuel (Austin TX), Probe card apparatus having a heating element and process for using the same.
  52. Khandros, Jr., Igor Y.; Sporck, Jr., A. Nicholas; Eldridge, Jr., Benjamin N., Probe card assembly.
  53. Higgins H. Dan ; Pandey Rajiv ; Armendariz Norman J. ; Bates R. Dennis, Probe card assembly for high density integrated circuits.
  54. Trenary Dale T. (San Jose CA), Probe card for integrated circuit chip.
  55. Okubo Masao (Nishinomiya JPX) Murakami Nobuyuki (Amagasaki JPX) Katahira Kouji (Kikuchi-gun JPX) Iwata Hiroshi (Otokuni-gun JPX) Okubo Kazumasa (Naka-gun JPX), Probe card for maintaining the position of a probe in high temperature application.
  56. Hembree David R. ; Farnworth Warren M. ; Akram Salman ; Wood Alan G. ; Doherty C. Patrick ; Krivy Andrew J., Probe card for semiconductor wafers and method and system for testing wafers.
  57. Monnet Ren (Seyssinet-Pariset FRX) Perrin Maurice (Saint Etienne de Crossey FRX), Probe card for testing integrated circuit chips.
  58. Liu Jui-Hsiang (Chandler AZ) Olsen Dennis R. (Scottsdale AZ), Probe card for testing unencapsulated semiconductor devices.
  59. Okubo Kazumasa (Kanagawa JPX) Okubo Masao (Nishinomiya JPX) Yoshimitsu Yasuro (Takatsuki JPX) Sugaya Kiyoshi (Amagasaki JPX), Probe card in which contact pressure and relative position of each probe end are correctly maintained.
  60. Okubo Kazumasa (Kanagawa JPX) Okubo Masao (Nishinomiya JPX) Yoshimitsu Yasuro (Takatsuki JPX) Sugaya Kiyoshi (Amagasaki JPX), Probe card in which contact pressure and relative position of each probe end are correctly maintained.
  61. Fujita Kazuhide (Osaka JPX), Probe structure for measuring electric characteristics of a semiconductor element.
  62. Nakano Shoukichi (Kawasaki JPX), Prober for semiconductor integrated circuit element wafer.
  63. Tada Tetsuo (Hyogo JPX) Takagi Ryouichi (Hyogo JPX), Probing card for wafer testing and method of manufacturing the same.
  64. James Marc Leas ; Robert William Koss ; Jody John Van Horn ; George Frederick Walker ; Charles Hampton Perry ; David Lewis Gardell ; Steve Leo Dingle ; Ronald Prilik, Semiconductor wafer test and burn-in.
  65. Simpson John P. (Apalachin NY), Surface mounted array strain relief device.
  66. Beaman Brian Samuel ; Fogel Keith Edward ; Lauro Paul Alfred ; Norcott Maurice Heathcote ; Shih Da-Yuan ; Walker George Frederick, Test probe for high density integrated circuits, methods of fabrication thereof and methods of use thereof.
  67. Beaman Brian S. (Hyde Park NY) Fogel Keith E. (Bardonia NY) Lauro Paul A. (Nanuet NY) Norcott Maurice H. (Valley Cottage NY) Shih Da-Yuan (Poughkeepsie NY) Walker George F. (New York NY), Test probe having elongated conductor embedded in an elostomeric material which is mounted on a space transformer.
  68. Aigo Seiichiro (3-15-13 Negishi ; Daito-Ku Tokyo JPX), Unitary probe assembly.

이 특허를 인용한 특허 (15) 인용/피인용 타임라인 분석

  1. Hobbs, Eric D.; Slocum, Alexander H., Method and apparatus for indirect planarization.
  2. Eldridge, Benjamin N.; Barbara, Bruce Jeffrey, Method to build a wirebond probe card in a many at a time fashion.
  3. Eldridge,Benjamin N.; Barbara,Bruce Jeffrey, Method to build a wirebond probe card in a many at a time fashion.
  4. Kister, January, Multiple contact probes.
  5. Kister, January, Probe bonding method having improved control of bonding material.
  6. Chung, In-Buhm, Probe card and method for fabricating the same.
  7. Eldridge, Benjamin N.; Khandros, Igor Y.; Sporck, A. Nicholas, Probe card assembly and kit.
  8. Khandros,Igor Y.; Sporck,A. Nicholas; Eldridge,Benjamin N., Probe card assembly and kit.
  9. Salmon, Jay; Swart, Roy E.; Liew, Brandon, Probe head assemblies and probe systems for testing integrated circuit devices.
  10. Kister, January; Shtarker, Alex, Probe retention arrangement.
  11. Kister, January, Probe skates for electrical testing of convex pad topologies.
  12. Kister, January, Probes with high current carrying capability and laser machining methods.
  13. Kister, January, Probes with offset arm and suspension structure.
  14. Kister, January, Vertical probe array arranged to provide space transformation.
  15. Edwards, Jathan; Marks, Charles; Halvorson, Brian, Wafer level integrated circuit probe array and method of construction.

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