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A digital (de)modulation system uses a larger code set of M codes for N length codes, where M>N, to provide an increased data rate while maintaining the coding gain. For example, the system can use 16 different codes each having a length of 11 chips in a code set while the conventional M-ary keyi

A digital (de)modulation system uses a larger code set of M codes for N length codes, where M>N, to provide an increased data rate while maintaining the coding gain. For example, the system can use 16 different codes each having a length of 11 chips in a code set while the conventional M-ary keying systems use a code set size of 8 for 11-chip codes or 8-chip codes. By extending the code set size, the system increases the data rate of the system. With 16 codes and the ability to change the sign of the code to be transmitted, the system can encode 5 data bits on both I and Q, so a total of 10 data bits can be encoded per code symbol. In this embodiment, a code symbol contains an 11 chip code on a I modulation branch and an 11 chip code on a Q modulation branch. As such, using 11 chip codes and a chip rate of 11 Mhz, the system provides a data rate of 10 Mbps while conventional M-ary keying systems can only achieve 8 Mbps using the same code length and chip rate. By extending the code length, the processing gain is increased. The extended code set is not orthogonal, so a non-zero cross-correlation value results between the different codes of the code set. However, the resulting noise and multipath performance degradation can be kept small by choosing code sets with small cross-correlation values (nearly orthogonal). The magnitudes of both cross-correlation values and auto-correlation sidelobes should preferably be below half a code length. In some embodiments, the code set is derived from orthogonal codes which are modified to reduce the autocorrelation sidelobes associated with the orthogonal codes. In other embodiments, the code set is derived using a complementary code which provides low autocorrelation sidelobes and is modified to reduce the cross-correlation values between the codes.

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The invention claimed is: 1. A method for modulating information bits over a radio frequency communication channel, comprising: grouping a number of information bits, based on the grouping, selecting a code having N chips from a code set that includes M codes, wherein M>N, and wherein the select

The invention claimed is: 1. A method for modulating information bits over a radio frequency communication channel, comprising: grouping a number of information bits, based on the grouping, selecting a code having N chips from a code set that includes M codes, wherein M>N, and wherein the selected code is derived from an orthogonal code and a complementary code, and modulating the phase of at least one carrier signal in accordance with the selected code. 2. The method of claim 1 further including: applying a phase shift to modulate at least one additional information bit on the at least one carrier signal. 3. The method of claim 2, wherein the number of information bits is six and the number of additional information bits is two. 4. The method of claim 1, wherein the phase of the at least one carrier signal is QPSK modulated in accordance with the selected code. 5. The method of claim 1, further including: scrambling the information bits prior to grouping. 6. The method of claim 1, wherein modulating the phase of at least one carrier signal includes In-phase and Quadrature phase modulating the at least one carrier signal. 7. The method according to claim 1, wherein the complementary code has a length of 2X chips where X is a positive integer. 8. The method according to claim 1, wherein the complementary code is defined by the sequence ABAB', such that A is a sequence of elements and B is a sequence of elements and wherein B' is derived by inverting all elements in the sequence B. 9. The method according to claim 8, wherein A={1 1} and B={1 0} such that the sequence ABAB'={1 1 1 0 1 1 0 1}. 10. The method according to claim 1, wherein the complementary code provides autocorrelation sidelobes suitable for multipath environments. 11. The method according to claim 1, wherein the code set is stored in a look-up table. 12. The method according to claim 1, wherein the complementary code is characterized by the property that for shifts in the complementary code, the autocorrelations of the complementary codes sum to zero except for the main peak at zero shift. 13. The method according to claim 1, wherein the complementary code provides for a code set that has autocorrelation sidelobes which are equal to or less than one-half the length of the N chip code. 14. The method according to claim 1, wherein the complementary code is the sequence {1 1 1 0 1 1 0 1 }. 15. The method according to claim 14, wherein the orthogonal code is a Walsh code and wherein the Walsh code is modified by multiplying the Walsh code by the complementary sequence {1 1 1 0 1 1 0 1 }. 16. A method for demodulating a received signal that conveys information bits over a radio frequency communication channel, comprising: correlating the received signal against a code set that includes M codes, each code having N chips wherein M>N, and wherein the selected code is derived from an orthogonal code and a complementary code, and decoding the information bits based upon the correlating step. 17. The method according to claim 16, wherein the complementary code has a length of 2X chips where X is a positive integer. 18. The method according to claim 16, wherein the complementary code is defined by the sequence ABAB', such that A is a sequence of elements and B is a sequence of elements and wherein B' is derived by inverting all elements in the sequence B. 19. The method according to claim 18, wherein A={1 1} and B={1 0} such that the sequence ABAB'={1 1 1 0 1 1 0 1}. 20. The method according to claim 16, wherein the complementary code provides autocorrelation sidelobes suitable for multipath environments. 21. The method according to claim 16, wherein the complementary code is characterized by the property that for shifts in the complementary code the autocorrelations of the complementary codes sum to zero except for the main peak at zero shift. 22. The method according to claim 16, wherein the complementary code provides for autocorrelation sidelobes in the code set which are equal to or less than one-half the length of the codes in the code set. 23. The method according to claim 16, wherein the decoding step decodes the information bits based upon the highest correlation magnitudes from the correlation step. 24. The method according to claim 16, wherein the decoding step decodes the information bits based upon the highest correlation complex magnitude from the correlation step. 25. The method according to claim 16, further comprising: detecting the phase of the code in the code set that generates the highest correlation magnitude, and decoding at least one bit per code based upon the detected phase. 26. A digital modulation system for modulating data bits, comprising: a serial-to-parallel converter that groups the data bits, and a modulator that chooses a code having N chips in response to the group of data bits, the code being a member of a code set that includes M codes, wherein M>N, and wherein the code set is derived from an orthogonal code and a complementary code. 27. The digital modulation system according to claim 26, further comprising a mixer that modulates a carrier signal in accordance with the chosen code. 28. The digital modulation system according to claim 27, wherein the mixer modulates the phase of at least one carrier signal in accordance with the selected code. 29. The digital modulation system according to claim 28, wherein the phase of the at least one carrier signal is QPSK modulated in accordance with the selected code. 30. The digital modulation system according to claim 26, further comprising a scrambler for scrambling the group of data bits. 31. The digital modulation system according to claim 26, wherein the complementary code is defined by the sequence ABAB', such that A is a sequence of elements and B is a sequence of elements and wherein B' is derived by inverting all elements in the sequence B. 32. The digital modulation system according to claim 31, wherein A={1 1} and B={1 0} such that the sequence ABAB'={1 1 1 0 1 1 0 1} . 33. The digital modulation system according to claim 26, wherein the complementary code provides autocorrelation sidelobes suitable for multipath environments. 34. The digital modulation system according to claim 26, further comprising a look-up table for storing the code set. 35. The digital modulation system according to claim 26, wherein the complementary code is characterized by the property that for shifts in the complementary code, the autocorrelations of the complementary codes sum to zero except for the main peak at zero shift. 36. The digital modulation system according to claim 26, wherein the complementary code provides for autocorrelation sidelobes in the code set which are equal to or less than one-half the length of the N chip code. 37. A digital modulation system for modulating a group of data bits, comprising: a scrambler for scrambling the group of data bits, and a modulator that chooses a code having N chips in response to the group of data bits, the code being a member of a code set that includes M codes, wherein M>N, and wherein the code set is derived from an orthogonal code and a complementary code. 38. The digital modulation system according to claim 37, wherein the complementary code is defined by the sequence ABAB', such that A is a sequence of elements and B is a sequence of elements and wherein B' is derived by inverting all elements in the sequence B. 39. The digital modulation system according to claim 38, wherein A={1 1} and B={1 0} such that the sequence ABAB'={1 1 1 0 1 1 0 1} . 40. The digital modulation system according to claim 37, wherein the complementary code provides autocorrelation sidelobes suitable for multipath environments. 41. The digital modulation system according to claim 37, further comprising a look-up table for storing the code set. 42. The digital modulation system according to claim 37, wherein the complementary code is characterized by the property that for shifts in the complementary code, the autocorrelations of the complementary codes sum to zero except for the main peak at zero shift. 43. The digital modulation system according to claim 37, wherein the complementary code provides for autocorrelation sidelobes in the code set which are equal to or less than one-half the length of the N chip code. 44. A digital demodulator for demodulating a received signal that conveys information bits over a radio frequency communication channel, comprising: a correlator block for correlating the received signal against a code set that includes M codes, each code having N chips wherein M>N, and wherein the code set is derived from an orthogonal code and a complementary code, and a find code block for decoding the information bits based upon the correlations of the received signal and the code set. 45. The digital demodulator according to claim 44, wherein the complementary code is defined by the sequence ABAB', such that A is a sequence of elements and B is a sequence of elements and wherein B' is derived by inverting all elements in the sequence B. 46. The digital demodulator according to claim 45, wherein A={1 1} and B={1 0} such that the sequence ABAB'={1 1 1 0 1 1 0 1}. 47. The digital demodulator according to claim 44, wherein the complementary code provides autocorrelation sidelobes suitable for multipath environments. 48. The digital demodulator according to claim 44, wherein the complementary code is characterized by the property that for shifts in the complementary code the autocorrelations of the complementary codes sum to zero except for the main peak at zero shift. 49. The digital demodulator according to claim 44, wherein the complementary code provides for autocorrelation sidelobes in the code set which are equal to or less than one-half the length of the N chip code. 50. The digital demodulator according to claim 44, further comprising a phase detector that detects the phase of the code in the code set that generates the highest correlation magnitude and that decodes an extra 2 bits per code based upon the detected phase. 51. The digital demodulator according to claim 44, wherein the orthogonal code is a Walsh code and wherein the Walsh code is modified by multiplying the Walsh code by a complementary sequence {1 1 1 0 1 1 0 1}. 52. The digital demodulator according to claim 44, further comprising an antenna for receiving a radio signal from the radio frequency channel. 53. The digital demodulator according to claim 46, further comprising an antenna for receiving a radio signal from the radio frequency channel. 54. The digital demodulator according to claim 52, further comprising a mixer operably coupled with the antenna, wherein the mixer extracts the modulated information from the radio signal received by the antenna. 55. The digital demodulator according to claim 54, further comprising a filter operably coupled to the mixer, wherein the filter filters the output of the mixer. 56. The digital demodulator according to claim 44, wherein the find code block decodes the information bits based upon the highest correlation magnitude output by the correlator block. 57. The digital demodulator according to claim 44, wherein the find code block decodes the information bits based upon the largest complex magnitude output by the correlator block. 58. The method according to claim 1, wherein the selecting step includes the step of calculating the code set using processing circuitry. 59. The digital modulation system according to claim 34, wherein the look-up table stores different sets of codes for changes in operation. 60. The digital modulation system according to claim 26, wherein the modulator includes processing circuitry for calculating the code set. 61. The digital modulation system according to claim 41, wherein the look-up table stores different sets of codes depending on changes in operation. 62. The digital modulation system according to claim 37, wherein the modulator includes processing circuitry for calculating the code set.