Communication decoder employing single trellis to support multiple code rates and/or multiple modulations
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
H03M-013/03
H03M-013/00
출원번호
US-0338377
(2003-01-08)
발명자
/ 주소
Cameron,Kelly Brian
Shen,Ba Zhong
Tran,Hau Thien
출원인 / 주소
Broadcom Corporation
대리인 / 주소
Garlick Harrison &
인용정보
피인용 횟수 :
5인용 특허 :
16
초록▼
Communication decoder employing single trellis to support multiple code rates and/or multiple modulations. A single trellis is employed by the decoder to decode a plurality of encoded symbols. Each of the plurality of encoded symbols is governed by a rate control. A rate control sequence, having a p
Communication decoder employing single trellis to support multiple code rates and/or multiple modulations. A single trellis is employed by the decoder to decode a plurality of encoded symbols. Each of the plurality of encoded symbols is governed by a rate control. A rate control sequence, having a period, is used to decode the plurality of encoded symbols that may be arranged within a frame. Various parameters of the plurality of encoded symbols may vary on a symbol by symbol basis; these parameters may include modulation, constellation, mapping, and/or bandwidth efficiency. For example, various symbols may be encoded differently, yet they may all be decoded using the same trellis. The functionality of this decoder may be implemented within a variety of different decoder embodiments including a trellis code modulation (TCM) decoder, a turbo trellis code modulation (TTCM) decoder, and/or a parallel concatenated turbo code modulation (PC-TCM) decoder.
대표청구항▼
What is claimed is: 1. An apparatus, comprising: a rate control sequencer that is operable to provide a rate control sequence having a plurality of rate controls arranged in a period, wherein: each rate control of a plurality of rate controls has a modulation selected from a plurality of modulation
What is claimed is: 1. An apparatus, comprising: a rate control sequencer that is operable to provide a rate control sequence having a plurality of rate controls arranged in a period, wherein: each rate control of a plurality of rate controls has a modulation selected from a plurality of modulations; each modulation of the plurality of modulations has a constellation selected from a plurality of constellations, a mapping selected from a plurality of mappings, and a bandwidth efficiency selected from a plurality of bandwidth efficiencies; each encoded symbol of a plurality of encoded symbols is encoded according to a rate control of the plurality of rate controls; for each encoded symbol of the plurality of encoded symbols, a metric generator is operable to calculate a plurality of metrics according to a rate control that corresponds to that encoded symbol; for each encoded symbol of the plurality of encoded symbols, the plurality of metrics are mapped to a plurality of trellis metrics based on a trellis according to the rate control that corresponds to that encoded symbol; a top soft-in soft-out functional block (SISO) that, based on the plurality of trellis metrics, is operable to calculate a first plurality of extrinsic values for each encoded symbol of the plurality of encoded symbols according to the respective rate control; an interleaver, communicatively coupled to the top SISO, that is operable to interleave the first plurality of extrinsic values to generate a first "a priori probability" (app) information; a bottom SISO that, based on the plurality of trellis metrics, is operable to calculate a second plurality of extrinsic values for each encoded symbol of the plurality of encoded symbols according to the respective rate control; a de-interleaver, communicatively coupled to the bottom SISO, that is operable to de-interleave the second plurality of extrinsic values to generate a second "a priori probability" (app) information, wherein: the first "a priori probability" (app) information is fed back to the bottom SISO; the second "a priori probability" (app) information is fed back to the top SISO; the top SISO and the bottom SISO operate cooperatively to perform at least one iteration of iterative decoding to generate a plurality of soft symbol decisions, each soft symbol decision of the plurality of soft symbol decisions corresponds to an encoded symbol of the plurality of encoded symbols; and an output processor, communicatively coupled to the bottom SISO, that is operable to generate a hard symbol decision for each soft symbol decision of the plurality of soft symbol decisions thereby making a best estimate for each encoded symbol of the plurality of encoded symbols. 2. The apparatus of claim 1, wherein: based on the plurality of trellis metrics, the top SISO is operable to calculate a plurality of forward metrics (alphas) and a plurality of backward metrics (betas) for use in calculating the first plurality of extrinsic values. 3. The apparatus of claim 1, wherein: based on the plurality of trellis metrics, the bottom SISO is operable to calculate a plurality of forward metrics (alphas) and a plurality of backward metrics (betas) for use in calculating the second plurality of extrinsic values. 4. The apparatus of claim 1, wherein: a first encoded symbol of the plurality of encoded symbols is encoded based on a first modulation of the plurality of modulations corresponding to a first rate control of the plurality of rate controls; and a second encoded symbol of the plurality of encoded symbols is encoded based on a second modulation of the plurality of modulations corresponding to a second rate control of the plurality of rate controls. 5. The apparatus of claim 4, wherein: the first rate control includes a constellation having a first mapping; and the second rate control includes the constellation having a second mapping. 6. The apparatus of claim 5, wherein: the first rate control includes a constellation for a QPSK (Quadrature Phase Shift Keying) modulation having the first mapping; and the second rate control includes the constellation for the QPSK modulation having the second mapping. 7. The apparatus of claim 1, wherein: a first encoded symbol of the plurality of encoded symbols is encoded according to a first bandwidth efficiency corresponding to a first rate control of the plurality of rate controls; and a second encoded symbol of the plurality of encoded symbols is encoded according to a second bandwidth efficiency corresponding to a second rate control of the plurality of rate controls. 8. The apparatus of claim 7, wherein: the first rate control includes a constellation having a first mapping; and the second rate control includes the constellation having a second mapping. 9. The apparatus of claim 8, wherein: the first rate control includes a constellation for a QPSK (Quadrature Phase Shift Keying) modulation having the first mapping; and the second rate control includes the constellation for the QPSK modulation having the second mapping. 10. The apparatus of claim 1, wherein: one modulation of the plurality of modulations is at least one of 8 Phase Shift Keying (PSK) modulation, Quadrature Phase Shift Keying (QPSK) modulation, 16 Quadrature Amplitude Modulation (QAM), and 16 Amplitude Phase Shift Keying (APSK) modulation. 11. The apparatus of claim 1, wherein: a first modulation of the plurality of modulations is a 16 Quadrature Amplitude Modulation (QAM); and a second modulation of the plurality of modulations is a 16 Amplitude Phase Shift Keying (APSK) modulation. 12. The apparatus of claim 1, wherein: one modulation of the plurality of modulations includes a Quadrature Phase Shift Keying (QPSK) modulation having constellation points that are tilted with respect to axes of an I,Q (in-phase and quadrature) plane. 13. The apparatus of claim 1, wherein: a first modulation of the plurality of modulations is a Quadrature Phase Shift Keying (QPSK) modulation having constellation points located further from an origin of an I,Q (in-phase and quadrature) plane than constellation points of a second modulation of the plurality of modulations that is also a Quadrature Phase Shift Keying (QPSK) modulation. 14. The apparatus of claim 1, wherein: the plurality of encoded symbols is arranged within a frame; each encoded symbol of the frame corresponds to a trellis stage; the trellis has a first predetermined number of states and a second predetermined number of possible branch metrics at each trellis stage; and the metric generator is operable to employ a flag to represent at least two trellis metrics of the plurality of trellis metrics. 15. The apparatus of claim 14, wherein: the flag indicates at least one of a maximum metric value and a minimum metric value. 16. The apparatus of claim 1, wherein: the plurality of encoded symbols are arranged within a frame; each encoded symbol of the frame corresponds to a trellis stage; and the trellis is an 8 state trellis having 16 possible branch metrics at each trellis stage. 17. The apparatus of claim 16, wherein: the metric generator is operable to perform normalization and saturation to reduce the 16 possible branch metrics down to 8 possible branch metrics for each encoded symbol of the frame. 18. The apparatus of claim 16, wherein: the first plurality of extrinsic values includes 4 extrinsic values for each encoded symbol of the frame; and the top SISO is operable to perform normalization and saturation to reduce the 4 extrinsic values down to 2 extrinsic values for each encoded symbol of the frame. 19. The apparatus of claim 16, wherein: the second plurality of extrinsic values includes 4 extrinsic values for each encoded symbol of the frame; and the bottom SISO is operable to perform normalization and saturation to reduce the 4 extrinsic values down to 2 extrinsic values for each encoded symbol of the frame. 20. The apparatus of claim 1, further comprising: a final output decoding multiplexor (MUX) that is operable alternatively to select the second plurality of extrinsic values from the bottom SISO and the second "a priori probability" (app) information from the de-interleaver to generate the plurality of soft symbol decisions that is provided to the output processor. 21. The apparatus of claim 1, wherein: at least one soft symbol decision of the plurality of soft symbol decisions includes a plurality of soft bit decisions. 22. The apparatus of claim 1, wherein: the output processor makes a best estimate for at least one uncoded bit using the best estimate for at least one encoded symbol of the plurality of encoded symbols. 23. The apparatus of claim 1, wherein: the apparatus receives the plurality of encoded symbols from an Additive White Gaussian Noise (AWGN) communication channel. 24. The apparatus of claim 1, wherein: at least one of the top SISO and the bottom SISO is initialized before performing a first iteration of the iterative decoding to generate a plurality of soft symbol decisions. 25. The apparatus of claim 1, wherein: the apparatus recycles a single SISO to perform the functionality of both the top SISO and the bottom SISO. 26. The apparatus of claim 1, wherein: the apparatus is operable to employ a single functional block to perform the functionality of both the interleaver and the de-interleaver. 27. The apparatus of claim 1, wherein: the apparatus is a decoder that is at least one of a trellis code modulation (TCM) decoder, a turbo trellis code modulation (TTCM) decoder, and a parallel concatenated turbo code modulation (PC-TCM) decoder. 28. The apparatus of claim 1, wherein: the apparatus is a decoder that is contained within at least one of a satellite communication system, a high definition television (HDTV) communication system, a cellular communication system, a microwave communication system, a point-to-point radio communication system, and a turbo trellis code modulation (TTCM) communication system. 29. An apparatus, comprising: an input that is operable to receive a plurality of encoded symbols that is encoded according to a rate control sequence having a plurality of rate controls arranged in a period, wherein each encoded symbol of the plurality of encoded symbols is encoded according to a rate control of the plurality of rate controls; a top soft-in soft-out functional block (SISO) that, based on a plurality of trellis metrics, is operable to calculate a first plurality of extrinsic values for each encoded symbol of the plurality of encoded symbols according to the respective rate control; an interleaver that is operable to interleave the first plurality of extrinsic values to generate a first "a priori probability" (app) information; a bottom SISO that, based on the plurality of trellis metrics, is operable to calculate a second plurality of extrinsic values for each encoded symbol of the plurality of encoded symbols according to the respective rate control; a de-interleaver that is operable to de-interleave the second plurality of extrinsic values to generate a second "a priori probability" (app) information, wherein: the first "a priori probability" (app) information is fed back to the bottom SISO; the second "a priori probability" (app) information is fed back to the top SISO; the top SISO and the bottom SISO operate cooperatively to perform at least one iteration of iterative decoding to generate a plurality of soft symbol decisions, each soft symbol decision of the plurality of soft symbol decisions corresponds to an encoded symbol of the plurality of encoded symbols; and an output processor, communicatively coupled to the bottom SISO, that is operable to generate a hard symbol decision for each soft symbol decision of the plurality of soft symbol decisions thereby making a best estimate for each encoded symbol of the plurality of encoded symbols. 30. The apparatus of the claim 29, further comprising: a rate control sequencer that is operable to provide the rate control sequence having the plurality of rate controls arranged in the period to the top SISO and to the bottom SISO and wherein: each rate control of the plurality of rate controls has a modulation selected from a plurality of modulations; and each modulation of the plurality of modulations has a constellation selected from a plurality of constellations, a mapping selected from a plurality of mappings, and a bandwidth efficiency selected from a plurality of bandwidth efficiencies. 31. The apparatus of claim 30, wherein: one modulation of the plurality of modulations is at least one of 8 Phase Shift Keying (PSK) modulation, Quadrature Phase Shift Keying (QPSK) modulation, 16 Quadrature Amplitude Modulation (QAM), and 16 Amplitude Phase Shift Keying (APSK) modulation. 32. The apparatus of claim 30, wherein: a first modulation of the plurality of modulations is a 16 Quadrature Amplitude Modulation (QAM); and a second modulation of the plurality of modulations is a 16 Amplitude Phase Shift Keying (APSK) modulation. 33. The apparatus of claim 30, wherein: one modulation of the plurality of modulations includes a Quadrature Phase Shift Keying (QPSK) modulation having constellation points that are tilted with respect to axes of an I,Q (in-phase and quadrature) plane. 34. The apparatus of claim 30, wherein: a first modulation of the plurality of modulations is a Quadrature Phase Shift Keying (QPSK) modulation having constellation points located further from an origin of an I,Q (in-phase and quadrature) plane than constellation points of a second modulation of the plurality of modulations that is also a Quadrature Phase Shift Keying (QPSK) modulation. 35. The apparatus of the claim 29, further comprising: for each encoded symbol of the plurality of encoded symbols, a metric generator that is operable to calculate a plurality of metrics according to the rate control that corresponds to that encoded symbol; and wherein: for each encoded symbol of the plurality of encoded symbols, the plurality of metrics are mapped to the plurality of trellis metrics based on a trellis according to the rate control that corresponds to that encoded symbol. 36. The apparatus of claim 29, wherein: a first rate control of the plurality of rate controls includes a first modulation; a first encoded symbol of the plurality of encoded symbols is encoded based on the first modulation; a second rate control of the plurality of rate controls includes a second modulation; a second encoded symbol of the plurality of encoded symbols is encoded based on the second modulation. 37. The apparatus of claim 36, wherein: the first rate control includes a constellation having a first mapping; and the second rate control includes the constellation having a second mapping. 38. The apparatus of claim 37, wherein: the first rate control includes a constellation for a QPSK (Quadrature Phase Shift Keying) modulation having the first mapping; and the second rate control includes the constellation for the QPSK modulation having the second mapping. 39. The apparatus of claim 29, wherein: a first rate control of the plurality of rate controls includes a first bandwidth efficiency; a first encoded symbol of the plurality of encoded symbols is encoded according to the first bandwidth efficiency; a second rate control of the plurality of rate controls includes a second bandwidth efficiency; and a second encoded symbol of the plurality of encoded symbols is encoded according to the second bandwidth efficiency. 40. The apparatus of claim 39, wherein: the first rate control includes a constellation having a first mapping; and the second rate control includes the constellation having a second mapping. 41. The apparatus of claim 40, wherein: the first rate control includes a constellation for a QPSK (Quadrature Phase Shift Keying) modulation having the first mapping; and the second rate control includes the constellation for the QPSK modulation having the second mapping. 42. The apparatus of claim 29, wherein: the plurality of encoded symbols are arranged within a frame; each encoded symbol of the frame corresponds to a trellis stage; the trellis has a first predetermined number of states and a second predetermined number of possible branch metrics at each trellis stage; and further comprising: a metric generator that is operable to employ a flag to represent at least two trellis metrics of the plurality of trellis metrics. 43. The apparatus of claim 42, wherein: the flag indicates at least one of a maximum metric value and a minimum metric value. 44. The apparatus of claim 29, wherein: the plurality of encoded symbols is arranged within a frame; each encoded symbol of the frame corresponds to a trellis stage; and the trellis is an 8 state trellis having 16 possible branch metrics at each trellis stage. 45. The apparatus of claim 44, wherein: the first plurality of extrinsic values includes 4 extrinsic values for each encoded symbol of the frame; and the top SISO is operable to perform normalization and saturation to reduce the 4 extrinsic values down to 2 extrinsic values for each encoded symbol of the frame. 46. The apparatus of claim 44, wherein: the second plurality of extrinsic values includes 4 extrinsic values for each encoded symbol of the frame; and the bottom SISO is operable to perform normalization and saturation to reduce the 4 extrinsic values down to 2 extrinsic values for each encoded symbol of the frame. 47. The apparatus of claim 29, further comprising: a final output decoding multiplexor (MUX) that is operable alternatively to select the second plurality of extrinsic values from the bottom SISO and the second "a priori probability" (app) information from the de-interleaver to generate the plurality of soft symbol decisions that is provided to the output processor. 48. The apparatus of claim 29, wherein: at least one soft symbol decision of the plurality of soft symbol decisions includes a plurality of soft bit decisions. 49. The apparatus of claim 29, wherein: the output processor is operable to make a best estimate for at least one uncoded bit using the best estimate for at least one encoded symbol of the plurality of encoded symbols. 50. The apparatus of claim 29, wherein: the apparatus is operable to receive the plurality of encoded symbols from an Additive White Gaussian Noise (AWGN) communication channel. 51. The apparatus of claim 29, wherein: at least one of the top SISO and the bottom SISO is initialized before performing a first iteration of the iterative decoding to generate a plurality of soft symbol decisions. 52. The apparatus of claim 29, wherein: the apparatus is operable to recycle a single SISO to perform the functionality of both the top SISO and the bottom SISO. 53. The apparatus of claim 29, wherein: the apparatus is operable to employ a single functional block to perform the functionality of both the interleaver and the de-interleaver. 54. The apparatus of claim 29, wherein: the apparatus is a decoder that is at least one of a trellis code modulation (TCM) decoder, a turbo trellis code modulation (TTCM) decoder, and a parallel concatenated turbo code modulation (PC-TCM) decoder. 55. The apparatus of claim 29, wherein: the apparatus is a decoder that is contained within at least one of a satellite communication system, a high definition television (HDTV) communication system, a cellular communication system, a microwave communication system, a point-to-point radio communication system, and a turbo trellis code modulation (TTCM) communication system.
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