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Apparatus and method for miniature semiconductor packages 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/495
  • H01L-023/48
출원번호 US-0942061 (2004-09-14)
발명자 / 주소
  • Lee,Shaw Wei
  • Tu,Nghia Thuc
  • Nadarajah,Santhiran S/O
  • Soon,Lim Peng
출원인 / 주소
  • National Semiconductor Corporation
대리인 / 주소
    Beyer Weaver & Thomas, LLP
인용정보 피인용 횟수 : 10  인용 특허 : 16

초록

A method and apparatus for making reliable miniature semiconductor packages having a reduced height and footprint is provided. The package includes a semiconductor chip having an active surface and a non-active surface and one or more contacts positioned adjacent the semiconductor chip. Electrical

대표청구항

We claim: 1. An apparatus, comprising: a semiconductor chip having an active surface and a non-active surface; a plurality of contacts positioned adjacent the semiconductor chip, the plurality of contacts each having a first end of varying lengths respectively, the varying lets of the plurality of

이 특허에 인용된 특허 (16)

  1. Oka Osamu,JPX ; Tochihira Jun,JPX ; Komagata Fumiki,JPX, Adhesive tape for electronic parts.
  2. Hashimoto Takeshi (Shizuoka JPX) Tezuka Akira (Shizuoka JPX) Nishigaya Takeshi (Shizuoka JPX) Yamanashi Fumiyoshi (Shizuoka JPX), Adhesive tape for electronic parts and liquid adhesive.
  3. Tanaka, Yuko; Shimada, Yasushi; Inada, Teiichi; Kuriya, Hiroyuki; Yamamoto, Kazunori; Kumashiro, Yasushi; Sumiya, Keiji, Adhesive, adhesive member, interconnecting substrate for semiconductor mounting having adhesive member, and semiconductor device containing the same.
  4. Hoffman Paul R. ; Popplewell James M. ; Braden Jeffrey S., Edge connectable metal package.
  5. Fan Nelson,HKX ; McLellan Neil,HKX, Exposed die leadless plastic chip carrier.
  6. Shin Won Sun,KRX ; Han Byung Joon,KRX ; Yoon Ju Hoon,KRX ; Kwak Sung Bum,KRX ; Han In Gyu,KRX, Lead end grid array semiconductor package.
  7. Enomoto Ryo (Gifu JPX) Asai Motoo (Gifu JPX) Sakaguchi Yoshikazu (Gifu JPX), Leadframe semiconductor-mounting substrate having a roughened adhesive conductor circuit substrate and method of produci.
  8. Ridder, Robert A.; Tramontana, Joseph C., Light emitting semiconductor mount.
  9. Glenn Thomas P. ; Jewler Scott J. ; Roman David ; Yee J. H.,KRX ; Moon D. H.,KRX, Plastic integrated circuit device package and leadframe having partially undercut leads and die pad.
  10. Kuraishi Fumio,JPX ; Yumoto Kazuhito,JPX ; Hayashi Mamoru,JPX, Semiconductor device having tab tape lead frame with reinforced outer leads.
  11. Takubo Chiaki (Yokohama JPX) Tazawa Hiroshi (Tokyo JPX) Tsuboi Yoshiharu (Tokyo JPX) Mochizuki Masao (Yokohama JPX), Semiconductor device using film carrier.
  12. Kouda Tsunenobu,JPX, Semiconductor device with plastic material covering a semiconductor chip mounted on a substrate of the device.
  13. Yamamoto Kazunori,JPX ; Shimada Yasushi,JPX ; Kumashiro Yasushi,JPX ; Inada Teiichi,JPX ; Kuriya Hiroyuki,JPX ; Kaneda Aizo,JPX ; Tomiyama Takeo,JPX ; Nomura Yoshihiro,JPX ; Hosokawa Yoichi,JPX ; Kir, Semiconductor device, semiconductor chip mounting substrate, methods of manufacturing the device and substrate, adhesive, and adhesive double coated film.
  14. Song Chi J. (Daejon KRX), Semiconductor package and method for manufacturing the same.
  15. Heung-su Gang KR, Semiconductor package having implantable conductive lands and method for manufacturing the same.
  16. Doi Yoshihiko (Hyogo JPX) Ogasa Nobuo (Hyogo JPX) Ohtsuka Akira (Hyogo JPX) Igarashi Tadashi (Hyogo JPX), Substrate for use in semiconductor apparatus.

이 특허를 인용한 특허 (10)

  1. Lee,Shaw Wei; Tu,Nghia Thuc; Nadarajah,Santhiran S/O; Soon,Lim Peng, Apparatus and method for miniature semiconductor packages.
  2. Trasporto, Arnel Senosa; Camacho, Zigmund Ramirez; Tay, Lionel Chien Hui; Caparas, Jose Alvin, Integrated circuit package system with chip on lead.
  3. Badakere Govindaiah, Guruprasad; Camacho, Zigmund Ramirez; Punzalan, Jeffrey D.; Bathan, Henry Descalzo; Tay, Lionel Chien Hui, Integrated circuit package system with dual connectivity.
  4. Camacho, Zigmund Ramirez; Caparas, Jose Alvin; Trasporto, Arnel Senosa; Punzalan, Jeffrey D., Integrated circuit package system with multiple molding.
  5. Camacho,Zigmund Ramirez; Caparas,Jose Alvin; Trasporto,Arnel; Punzalan,Jeffrey D., Integrated circuit package system with multiple molding.
  6. Do, Byung Tai; Shim, Il Kwon; Dimaano, Jr., Antonio B.; Kuan, Heap Hoe, Integrated circuit package system with warp-free chip.
  7. Dahilig, Frederick Rodriguez; Camacho, Zigmund Ramirez; Bathan, Henry Descalzo; Tay, Lionel Chien Hui, Integrated circuit packaging system with increased connectivity and method of manufacture thereof.
  8. Camacho, Zigmund Ramirez; Merilo, Dioscoro A.; Tay, Lionel Chien Hui, Method for manufacturing semiconductor package system with die support pad.
  9. Camacho, Zigmund Ramirez; Bathan, Henry D.; Trasporto, Arnel; Punzalan, Jeffrey D., Padless die support integrated circuit package system.
  10. Hsu, Yueh-Liang; Chang, Chi-Wen, Quad flat non-leaded package.
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