IPC분류정보
국가/구분 |
United States(US) Patent
등록
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국제특허분류(IPC7판) |
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출원번호 |
US-0188697
(2002-07-01)
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발명자
/ 주소 |
- Voorhies,Douglas A.
- Craighead,Matthew
- Kilgard,Mark J.
- Hutchins,Edward
- Everitt,Cass W.
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출원인 / 주소 |
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대리인 / 주소 |
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인용정보 |
피인용 횟수 :
40 인용 특허 :
61 |
초록
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A system and method are provided for conditional branching in a hardware graphics pipeline. Initially, a plurality of graphics commands is received. Condition data is then affected based on at least some of the graphics commands utilizing the hardware graphics pipeline. At least one of the graphics
A system and method are provided for conditional branching in a hardware graphics pipeline. Initially, a plurality of graphics commands is received. Condition data is then affected based on at least some of the graphics commands utilizing the hardware graphics pipeline. At least one of the graphics commands is then conditionally skipping based on the condition data in response to another graphics command utilizing the hardware graphics pipeline.
대표청구항
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What is claimed is: 1. A method for conditional branching in a hardware graphics pipeline, comprising: receiving a plurality of graphics commands; affecting condition data based on at least some of the graphics commands utilizing the hardware graphics pipeline; and conditionally skipping at least o
What is claimed is: 1. A method for conditional branching in a hardware graphics pipeline, comprising: receiving a plurality of graphics commands; affecting condition data based on at least some of the graphics commands utilizing the hardware graphics pipeline; and conditionally skipping at least one of the graphics commands based on the condition data in response to another graphics command utilizing the hardware graphics pipeline; wherein the condition data that governs the conditional skipping of the at least one graphics command is affected by rendering initiated by the graphics commands. 2. The method as set forth in claim 1, wherein the at least one graphics command is conditionally skipped for improving a performance of the hardware graphics pipeline. 3. The method as set forth in claim 1, wherein the graphics commands are received in a buffer. 4. The method as set forth in claim 3, wherein the graphics commands are accessed utilizing a controller of the hardware graphics pipeline coupled to the buffer. 5. The method as set forth in claim 1, wherein the condition data is tracked in a condition data register of the hardware graphics pipeline. 6. The method as set forth in claim 1, wherein the at least one graphics command is conditionally skipped utilizing logic of the hardware graphics pipeline. 7. The method as set forth in claim 1, wherein the condition data is affected by a z-value culling operation. 8. The method as set forth in claim 1, wherein the rendering includes a test, a result of which affects the condition data. 9. The method as set forth in claim 8, wherein the test includes a depth test. 10. The method as set forth in claim 8, wherein the test includes a stencil test. 11. The method as set forth in claim 8, wherein the test includes a visibility test. 12. The method as set forth in claim 1, wherein the rendering is performed in response to the graphics commands utilizing the hardware graphics pipeline. 13. The method as set forth in claim 12, wherein objects are rendered. 14. The method as set forth in claim 12, wherein bounding volumes are rendered. 15. The method as set forth in claim 14, wherein the bounding volumes are rendered on a portion-by-portion basis. 16. The method as set forth in claim 14, wherein the rendering of the bounding volumes is accelerated using a z-value culling operation. 17. The method as set forth in claim 12, and further comprising identifying the condition data during the rendering utilizing the hardware graphics pipeline. 18. The method as set forth in claim 17, and further comprising identifying a threshold during the rendering utilizing the hardware graphics pipeline. 19. The method as set forth in claim 18, and further comprising performing a test based on the threshold during the rendering utilizing the hardware graphics pipeline. 20. The method as set forth in claim 19, and further comprising affecting the condition data based on the test utilizing the hardware graphics pipeline. 21. The method as set forth in claim 1, wherein the graphics commands define a bounding volume that is involved in a depth test utilizing the hardware graphics pipeline. 22. The method as set forth in claim 1, wherein the condition data is tracked utilizing a condition code. 23. The method as set forth in claim 1, wherein the condition data includes a multiple-bit visibility vector. 24. The method as set forth in claim 1, and further comprising rendering non-bounding volumes in response to the graphics commands utilizing the hardware graphics pipeline. 25. The method as set forth in claim 1, wherein the skipped graphics commands are not received by the hardware graphics pipeline. 26. A system for conditional branching in a hardware graphics pipeline, comprising: means for receiving a plurality of graphics commands; means for affecting condition data based on at least some of the graphics commands utilizing the hardware graphics pipeline; and means for conditionally skipping at least one of the graphics commands based on the condition data in response to another graphics command utilizing the hardware graphics pipeline; wherein the condition data that governs the conditional skipping of the at least one graphics command is affected by rendering initiated by the graphics commands. 27. A hardware graphics pipeline for conditional branching, comprising: a buffer for receiving a plurality of graphics commands; a condition data register for storing condition data based on the graphics commands; and logic coupled to the buffer and the condition data register, the logic capable of conditionally skipping at least one of the graphics commands based on the condition data in response to another graphics command; wherein the condition data that governs the conditional skipping of the at least one graphics command is affected by rendering initiated by the graphics commands. 28. A tile-based hardware graphics pipeline for conditional branching, comprising: a buffer for receiving a plurality of graphics commands in the tile-based hardware graphics pipeline; a condition data register for storing condition data based on the graphics commands; and tile-based hardware graphics pipeline logic coupled to the buffer and the condition data register, the tile-based hardware graphics pipeline logic capable of conditionally skipping at least one of the graphics commands based on the condition data in response to another graphics command for discarding occluded fragments; wherein the condition data that governs the conditional skipping of the at least one graphics command is affected by rendering initiated by the graphics commands. 29. A method for conditional branching in a hardware graphics pipeline, comprising: receiving a plurality of graphics commands in a buffer of the hardware graphics pipeline; accessing the graphics commands in the buffer of the hardware graphics pipeline; rendering objects in response to the accessed graphics commands utilizing the hardware graphics pipeline, rendering bounding volumes in response to the accessed graphics commands utilizing the hardware graphics pipeline; identifying condition data during the rendering utilizing the hardware graphics pipeline; identifying a threshold during the rendering utilizing the hardware graphics pipeline; performing a test based on the threshold during the rendering utilizing the hardware graphics pipeline; affecting the condition data based on the test utilizing the hardware graphics pipeline; and conditionally skipping at least one of the graphics command based on the condition data in response to another graphics command utilizing the hardware graphics pipeline; wherein the condition data that governs the conditional skipping of the at least one graphics command is affected by the rendering initiated by the graphics commands. 30. A method for direct memory access, comprising: receiving a plurality of pointers to graphics commands; utilizing at least one of the pointers to fetch the graphics commands by direct memory access; processing the fetched graphics commands in a hardware graphics pipeline, at least some of the processed graphics commands affecting condition data; and conditionally skipping at least one of the graphics commands based on the condition data, the skipping being done by not fetching the conditionally skipped commands by the direct memory access; wherein the condition data that governs the conditional skipping of the at least one graphics command is affected by rendering initiated by the graphics commands. 31. The method as set forth in claim 30, wherein the at least one graphics command is conditionally skipped for improving a performance of the hardware graphics pipeline. 32. The method as set forth in claim 30, wherein the graphics commands are received in a buffer. 33. The method as set forth in claim 32, wherein the graphics commands are accessed utilizing a controller of the hardware graphics pipeline coupled to the buffer. 34. The method as set forth in claim 30, wherein the condition data is tracked in a condition data register of the hardware graphics pipeline. 35. The method as set forth in claim 30, wherein the at least one graphics commands is conditionally skipped utilizing logic of the hardware graphics pipeline. 36. The method as set forth in claim 30, wherein the condition data is affected by a z-value culling operation. 37. The method as set forth in claim 30, wherein the rendering includes a test, a result of which affects the condition data. 38. The method as set forth in claim 37, wherein the test includes a depth test. 39. The method as set forth in claim 37, wherein the test includes a stencil test. 40. The method as set forth in claim 37, wherein the test includes a visibility test. 41. The method as set forth in claim 30, wherein the rendering is performed in response to the graphics commands utilizing the hardware graphics pipeline. 42. The method as set forth in claim 41, wherein objects are rendered. 43. The method as set forth in claim 41, wherein bounding volumes are rendered. 44. The method as set forth in claim 43, wherein the bounding volumes are rendered on a portion-by-portion basis. 45. The method as set forth in claim 43, wherein the rendering of the bounding volumes is accelerated using a z-value culling operation. 46. The method as set forth in claim 41, and further comprising identifying the condition data during the rendering utilizing the hardware graphics pipeline. 47. The method as set forth in claim 46, and further comprising identifying a threshold during the rendering utilizing the hardware graphics pipeline. 48. The method as set forth in claim 47, and further comprising performing a test based on the threshold during the rendering utilizing the hardware graphics pipeline. 49. The method as set forth in claim 48, and further comprising affecting the condition data based on the test utilizing the hardware graphics pipeline. 50. The method as set forth in claim 30, wherein the graphics commands define a bounding volume that is involved in a depth test utilizing the hardware graphics pipeline. 51. The method as set forth in claim 30, wherein the condition data is tracked utilizing a condition code. 52. The method as set forth in claim 30, wherein the condition data includes a multiple-bit visibility vector. 53. The method as set forth in claim 30, and further comprising rendering non-bounding volumes in response to the graphics commands utilizing the hardware graphics pipeline.
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