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System and method for display list occlusion branching 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06T-015/00
출원번호 US-0188697 (2002-07-01)
발명자 / 주소
  • Voorhies,Douglas A.
  • Craighead,Matthew
  • Kilgard,Mark J.
  • Hutchins,Edward
  • Everitt,Cass W.
출원인 / 주소
  • NVIDIA Corporation
대리인 / 주소
    Zilka Kotab, PC
인용정보 피인용 횟수 : 40  인용 특허 : 61

초록

A system and method are provided for conditional branching in a hardware graphics pipeline. Initially, a plurality of graphics commands is received. Condition data is then affected based on at least some of the graphics commands utilizing the hardware graphics pipeline. At least one of the graphics

대표청구항

What is claimed is: 1. A method for conditional branching in a hardware graphics pipeline, comprising: receiving a plurality of graphics commands; affecting condition data based on at least some of the graphics commands utilizing the hardware graphics pipeline; and conditionally skipping at least o

이 특허에 인용된 특허 (61)

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  10. Seetharamaiah, Avinash; Frascati, Christopher Paul, Hardware switching between direct rendering and binning in graphics processing.
  11. Bakalash, Reuven; Leviathan, Yaniv, Internet-based graphics application profile management system for updating graphic application profiles stored within the multi-GPU graphics rendering subsystems of client machines running graphics-based applications.
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  13. Seiler, Larry D.; Morein, Stephen L., Method and apparatus for hierarchical Z buffering and stenciling.
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  16. Bakalash, Reuven; Leviathan, Yaniv, Method of generating digital images of objects in 3D scenes while eliminating object overdrawing within the multiple graphics processing pipeline (GPPLS) of a parallel graphics processing system generating partial color-based complementary-type images along the viewing direction using black pixel rendering and subsequent recompositing operations.
  17. Bakalash, Reuven; Remez, Offir; Bar-Or, Gigy; Fogel, Efi; Shaham, Amir, Method of providing a PC-based computing system with parallel graphics processing capabilities.
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  19. Balci, Murat; Frascati, Christopher Paul; Seetharamaiah, Avinash, Optimized multi-pass rendering on tiled base architectures.
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  28. Bakalash, Reuven; Remez, Offir; Fogel, Efi, PC-based computing systems employing a bridge chip having a routing unit for distributing geometrical data and graphics commands to parallelized GPU-driven pipeline cores supported on a plurality of graphics cards and said bridge chip during the running of a graphics application.
  29. Bakalash, Reuven; Leviathan, Yaniv, PC-level computing system with a multi-mode parallel graphics rendering subsystem employing an automatic mode controller, responsive to performance data collected during the run-time of graphics applications.
  30. Bakalash, Reuven; Leviathan, Yaniv, Parallel graphics system employing multiple graphics processing pipelines with multiple graphics processing units (GPUS) and supporting an object division mode of parallel graphics processing using programmable pixel or vertex processing resources provided with the GPUS.
  31. Bakalash, Reuven; Remez, Offir; Fogel, Efi, Silicon chip of a monolithic construction for use in implementing multiple graphic cores in a graphics processing and display subsystem.
  32. Remez, Offir; Shoshan, Yoel; Sela, Guy, Silicon chip of a monolithic construction for use in implementing multiple graphic cores in a graphics processing and display subsystem.
  33. Seetharamaiah, Avinash; Frascati, Christopher Paul; Balci, Murat, Switching between direct rendering and binning in graphics processing.
  34. Seetharamaiah, Avinash; Frascati, Christopher Paul, Switching between direct rendering and binning in graphics processing using an overdraw tracker.
  35. Brown,Patrick R.; Kilgard,Mark J.; Glanville,Robert Steven, System and method for converting a vertex program to a binary format capable of being executed by a hardware graphics pipeline.
  36. Pelton, Blake D.; Patel, Amar; Pronovost, Steve, System and method for layering using tile-based renderers.
  37. Pelton, Blake D.; Patel, Amar; Pronovost, Steve, System and method for layering using tile-based renderers.
  38. Lindholm, John Erik; Moy, Simon S.; Glanville, Robert Steven, System, method and computer program product for branching during programmable vertex processing.
  39. Xu, Xianchao; Gong, Lili, Techniques for multiple pass rendering.
  40. Xu, Xianchao; Gong, Lili, Techniques for multiple pass rendering.
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