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System and method for goal-based scheduling of blocks of code for concurrent execution 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-013/00
  • G06F-012/00
  • G06F-013/18
  • G06F-013/16
  • G06F-009/46
출원번호 US-0277602 (2002-10-22)
발명자 / 주소
  • Dutt,Bala
  • Kumar,Ajay
  • Susarla,Hanumantha R.
출원인 / 주소
  • Sun Microsystems, Inc.
대리인 / 주소
    Meyertons, Hood, Kivlin, Kowert & Goetzel, P.c.
인용정보 피인용 횟수 : 29  인용 특허 : 24

초록

초록이 없습니다.

대표청구항

대표청구항이 없습니다.

이 특허에 인용된 특허 (24)

  1. Jeremiah Thomas Leo (Endwell NY) Blaner Bartholomew (Newark Valley NY), Cross-cache-line compounding algorithm for scism processors.
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  2. Ishikawa Tadashi,JPX, Digital computer system capable of processing a plurality of instructions in parallel based on a VLIW architecture.
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  3. Hardwick Jonathan C.,GBX, Dynamic load balancing among processors in a parallel computer.
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  4. Bharadwaj Jayashankar, Method and apparatus for instruction scheduling to reduce negative effects of compensation code.
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  5. Greicar, Richard K., Method and apparatus for multi-part processing of program code by a single processor.
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  6. Hay, Russell C., Method and apparatus for scheduling processes based upon virtual server identifiers.
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  7. Yue Kelvin K. ; Stein Daniel A. ; Sebree Michael A., Method and apparatus for sharing a time quantum.
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  8. Spix George A. ; Wengelski Diane M. ; Hawkinson Stuart W. ; Johnson Mark D. ; Burke Jeremiah D. ; Thompson Keith J. ; Gaertner Gregory G. ; Brussino Giacomo G. ; Hessel Richard E. ; Barkai David M. ;, Method and apparatus for user side scheduling in a multiprocessor operating system program that implements distributive scheduling of processes.
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  9. Beadle Bruce Anthony ; Brown Michael Wayne ; Paolini Michael Anthony ; Rothert Douglas Scott, Method and apparatus to selectively control processing of a method in a java virtual machine.
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  10. Kranich, Uwe; Christie, David S., Method and mechanism for speculatively executing threads of instructions.
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  11. Schwartz, Leon, Method for automatic parallelization of software.
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  12. Stubbs David D. (Portland OR) Barnett Mark P. (Portland OR) Greenseth William A. (Portland OR), Method of generating instruction sequences for controlling data flow processes.
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  13. Guy E. Blelloch ; Phillip B. Gibbons ; Yossi Matias IL; Girija J. Narlikar, Methods and apparatus for scheduling parallel processors.
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  14. Blelloch Guy E. ; Gibbons Phillip B. ; Matias Yossi, Methods and means for scheduling parallel processors.
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  15. Nemawarkar, Shashank, Multithreaded processor efficiency by pre-fetching instructions for a scheduled thread.
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  16. Funaki Hiroshi (Tokyo JPX), Optimizing compiler which generates multiple instruction streams to be executed in parallel.
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  17. Hirooka, Takashi; Ohta, Hiroshi; Iitsuka, Takayoshi; Kikuchi, Sumio, Parallel program generating method.
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  18. Iwasawa Kyoko (Tokyo JPX) Tanaka Yoshikazu (Oomiya JPX) Gotou Shizuo (Machida JPX), Parallelization compile method and system.
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  19. Zaiki Koji (Osaka JPX), Processor scheduling method for iterative loops.
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  20. Tabata, Kunio; Komatsu, Hideaki, Program optimization method, and compiler using the same.
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  21. McMinn Brian D. ; Gowin ; Jr. Robert D., Reorder buffer circuit accommodating special instructions operating on odd-width results.
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  22. Carmean, Douglas M.; Sager, David J.; Toll, Thomas F.; Menezes, Karol F., Replay instruction morphing.
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  23. Spix George A. (Eau Claire WI) Wengelski Diane M. (Eau Claire WI) Hawkinson Stuart W. (Eau Claire WI) Johnson Mark D. (Eau Claire WI) Burke Jeremiah D. (Eau Claire WI) Thompson Keith J. (Eau Claire W, System and method for controlling a highly parallel multiprocessor using an anarchy based scheduler for parallel executi.
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  24. Reeve Christopher L. (18 Salisbury Rd. Brookline MA 02146) Shavit Tani (One Seaborn Pl. Lexington MA 02173) Rothnie ; Jr. James B. (47 Monmouth St. Brookline MA 02146) Peters Timothy G. (11 Wilbur St, System for parallel processing that compiles a filed sequence of instructions within an iteration space.
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  2. Schloegel, Kirk; Bhatt, Devesh, Auto-generation of concurrent code for multi-core applications.
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  3. Vazquez, Pedro; Lopez, Alejandro P.; Martikian, Pablo, Configuration tool with multi-level priority semantic.
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  4. Waldspurger, Carl; Zedlewski, John; Dorofeev, Andrei, Defining and measuring skew between coscheduled contexts.
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  5. Waldspurger, Carl; Zedlewski, John; Dorofeev, Andrei, Detecting and responding to skew between coscheduled contexts.
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  6. Danoyan, Alexander Y.; Isaacson, Scott A., Fine grained access control for linux services.
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  12. Zheng, Haoqiang; Waldspurger, Carl A., Implicit co-scheduling of CPUs.
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  14. Isaacson, Scott A., Light-weight multi-user browser.
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  15. Toub, Stephen H.; Yildiz, Huseyin S.; Hoag, Joseph E.; Duffy, John J.; Shih, Danny, Plug-in task scheduler.
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  17. Cowan, S. Crispin; Arnold, Seth R.; Beattie, Steven M.; Johansen, John R.; Michael, Jesse D.; Jones, Anthony N., Role based access controls.
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  18. Waldspurger, Carl; Zedlewski, John; Dorofeev, Andrei, Scheduling selected contexts in response to detecting skew between coscheduled contexts.
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  19. Kataoka, Masaki; Komatsu, Hideaki; Kondoh, Goh; Ohsawa, Fumitomo, Simulation method, system and program.
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  20. Danoyan, Alexander Y.; Isaacson, Scott A., Synthesized root privileges.
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  21. Dutt,Bala; Kumar,Ajay; Susarla,Hanumantha R., System and method for block-based concurrentization of software code.
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  22. Wipfel, Robert A., System and method for creating a customized installation on demand.
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  25. Richards, Andrew; Cook, Andrew; Riley, Colin, System and method for parallel execution of a program.
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  27. McCready, Arthur Kirk; Larson, Aaron R.; Roffelsen, Ryan Lawrence; Miller, Larry James; Rangarajan, Murali, Systems and methods for bounding processing times on multiple processing units.
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  28. Easwaran, Arvind; Varadarajan, Srivatsan, Systems and methods generating inter-group and intra-group execution schedules for instruction entity allocation and scheduling on multi-processors.
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  29. Wannamaker, Jeffrey; Scheyen, Peter G. N., Targeted runtime compilation.
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