이 특허에 인용된 특허 (229) 인용/피인용 타임라인 분석

1. Zavrel ; Jr. Robert J. ; Baumann Dan C., Apparatus and method for an integrated circuit having high Q reactive components.

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2. Reisman Arnold (Raleigh NC) Osburn Carlton M. (Cary NC) Hwang Lih-Tyng (Raleigh NC) Narayan Jagdish (Raleigh NC), Apparatus for mounting a semiconductor chip and making electrical connections thereto.

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3. Laureanti Steven J. ; Michaud Russ ; Neitiniemi Jukka-Pekka ; Saukko Kari, Apparatus, and associated method, for shielding emi-generative components of an electrical device.

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4. Haba, Belgacem; Beroz, Masud, Assemblies having stacked semiconductor chips and methods of making same.

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5. Pedder David John,GBX, Ball grid array arrangement.

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6. Bond Robert H. (Plano TX) Hundt Michael J. (Double Oak TX), Ball-grid-array integrated circuit package with solder-connected thermal conductor.

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7. Peterson, Kenneth A.; Watson, Robert D., Bi-level microelectronic device package with an integral window.

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8. Merrill Richard Billings ; Singh Inderjit, Bonding wire inductor for use in an integrated circuit package and method.

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9. Askinazi Joel ; Narayanan Authi A. ; Bui Hoa T. ; Vigil Joseph A. ; Vajo John J., Broadband protective optical window coating.

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10. Freyman Bruce J. ; Darveaux Robert F., Carrier strip and molded flex circuit ball grid array.

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11. Freyman Bruce J. ; Darveaux Robert F., Carrier strip and molded flex circuit ball grid array and method of making.

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12. Foster Ronald R., Chip scale packaging technique for optical image sensing integrated circuits.

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13. Eide Floyd K. (Huntington Beach CA) Forthun John A. (Glendora CA) Isaak Harlan (Costa Mesa CA), Chip stack and method of making same.

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14. Irfan M. Rahim, Circuit structure including a passive element formed within a grid array substrate and method for making the same.

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15. Park Chul Ho (Chungcheongbuk-do KRX) Shim Jin Seop (Chungcheongbuk-do KRX) Song Kwang Bok (Seoul KRX), Color charge-coupled device and method of manufacturing the same.

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16. Tonegawa Ken,JPX ; Mandai Harufumi,JPX ; Bando Tomoya,JPX, Complex electronic component.

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17. Distefano Thomas H. ; Karavakis Konstantine ; Mitchell Craig ; Smith John W., Compliant integrated circuit package and method of fabricating the same.

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18. Distefano Thomas H. ; Smith John W. ; Kovac Zlata ; Karavakis Konstantine, Compliant microelectrionic mounting device.

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19. DiStefano Thomas H. (Monte Sereno CA) Smith John W. (Palo Alto CA), Compliant thermal connectors and assemblies incorporating the same.

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20. Jiang, Tongbi; Schrock, Edward, Composite interposer for BGA packages.

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21. Weixel Mark, Composite thermal interface pad.

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22. Pedersen David V. (Scotts Valley CA) Finley Michael G. (Cambria CA) Sautter Kenneth M. (Sunnyvale CA), Conductive epoxy flip-chip package and method.

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23. Pedersen David V. ; Finley Michael G. ; Sautter Kenneth M., Conductive epoxy flip-chip package and method.

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24. Faraci Tony ; DiStefano Thomas H. ; Smith John W., Connecting multiple microelectronic elements with lead deformation.

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25. DiStefano Thomas H. ; Grube Gary W. ; Khandros Igor Y. ; Mathieu Gaetan ; Sweis Jason ; Union Laurie ; Gibson David, Connection components with frangible leads and bus.

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26. Kurtz Anthony D. ; Ned Alexander A., Covered sealed pressure transducers and method for making same.

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27. Martin Jacob H. (Wellesley MA), Covers for micromechanical sensors and other semiconductor devices.

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28. Nye ; III Henry A. ; McGahay Vincent J. ; Tallman Kurt A., Crackstop and oxygen barrier for low-K dielectric integrated circuits.

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29. Gorowitz Bernard ; Wojnarowski Robert John ; Kolc Ronald Frank, Demountable and repairable low pitch interconnect for stacked multichip modules.

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30. Carson, John C.; Clark, Stewart A., Detector array module-structure and fabrication.

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31. Siniaguine, Oleg, Devices having substrates with opening passing through the substrates and conductors in the openings, and methods of manufacture.

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32. Knibb Terence F. (Northampton GB2) O\Rourke Richard G. (Northampton GB2), Display devices.

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33. Kierse Oliver J. (County Clare IEX), EMF shielding of an integrated circuit package.

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34. Andre Salaville FR, Electrical or electronic component encapsulated in a sealed manner.

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35. Funaya, Takuo; Shimoto, Tadanori; Senba, Naoji; Matsui, Koji, Electronic device assembly and a method of connecting electronic devices constituting the same.

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36. Weekamp, Johannus Wilhelmus; Jorritsma, Jorrit; Tijssen, Edwin Petrus Alois Maria; De Samber, Marc Andre, Electronic device having an electronic component with a multi-layer cover, and method.

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37. Wojnarowski Robert John, Electronic device pad relocation, precision placement, and packaging in arrays.

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38. Wojnarowski Robert John, Electronic device pad relocation, precision placement, and packaging in arrays.

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39. Horton Raymond Robert ; Lanzetta Alphonso Philip ; Milewski Joseph Maryan ; Mok Lawrence S. ; Montoye Robert Kevin ; Shaukatulla Hussain, Electronic package with interconnected chips.

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40. Onishi Keiji,JPX ; Iwaki Hideki,JPX ; Seki Shun-ichi,JPX ; Taguchi Yutaka,JPX ; Shiraishi Tsukasa,JPX ; Bessho Yoshihiro,JPX ; Kawasaki Osamu,JPX ; Eda Kazuo,JPX, Electronic part and a method of production thereof.

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41. Wojnarowski Robert J. (Ballston Lake NY) Gorczyca Thomas B. (Schenectady NY), Fabrication and structures of two-sided molded circuit modules with flexible interconnect layers.

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42. Wojnarowski Robert John (Ballston Lake NY) Gorczyca Thomas Bert (Schenectady NY), Fabrication and structures of two-sided molded circuit modules with flexible interconnect layers.

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43. Watson George P. (Plainfield NJ) Meehan Kathleen (Somerville NJ), Fabrication of integral lenses on LED devices.

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44. Gotoh Masashi,JPX ; Kanazawa Jitsuo,JPX ; Kuwajima Hajime,JPX, Face-down mounted surface acoustic wave device.

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45. DiStefano Thomas H. (Monte Sereno CA) Smith John W. (Palo Alto CA) Faraci Tony (Georgetown TX), Fan-out semiconductor chip assembly.

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46. Distefano Thomas ; Smith John W. ; Faraci Anthony B., Fixtures and methods for lead bonding and deformation.

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47. Wojnarowski Robert John, Flexible interface structures for electronic devices.

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48. Wojnarowski Robert John, Flexible interface structures for electronic devices.

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49. Peugh Darrel Eugene ; Berndt Joanna Christine ; Myers Bruce Alan, Flip chip on circuit board with enhanced heat dissipation and method therefor.

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50. Thomas P. Glenn ; Steven Webster ; Roy Dale Hollaway, Flip chip on glass image sensor package fabrication method.

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51. Glenn, Thomas P.; Webster, Steven; Hollaway, Roy Dale, Flip chip on glass sensor package.

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52. Glenn Thomas P., Flip-chip micromachine package fabrication method.

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53. Belgacem Haba, Forming microelectronic connection components by electrophoretic deposition.

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54. Kwon Oh-Kyong (Plano TX) Hashimoto Masashi (Garland TX) Malhi Satwinder (Garland TX) Born Eng C. (Richardson TX), Full wafer integrated circuit testing device.

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55. Barton, Eric J.; Pitou, David S.; Johnson, Patricia E.; Safai, Mohammad A.; Roland, James P., Glass attachment over micro-lens arrays.

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56. Voss Scott V. (Portola Valley CA), Heat dissipating interconnect tape for use in tape automated bonding.

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57. Farnworth Warren M., Hermetically sealed chip scale packages formed by wafer level fabrication and assembly.

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58. Kurogi Garrett I. (Lakewood CA) Swass Matthew J. (El Segundo CA), Hermetically self-sealing flip chip.

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59. Go Tiong C. (El Toro CA), High density electronic package comprising stacked sub-modules.

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60. Hikita Mitsutaka (Hachioji JPX) Sumioka Atsushi (Kokubunji JPX) Akagi Takatoshi (Kokubunji JPX) Tabuchi Toyoji (Kanagawa JPX) Shibagaki Nobuhiko (Hachioji JPX), High frequency module including a flexible substrate.

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61. Shenoy Jayarama N., High performance chip/package inductor integration.

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62. Degani, Yinon; Dudderar, Thomas Dixon; Tai, King Lien, High performance multi-chip IC package.

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63. Dierschke Eugene G. (Dallas TX), High-radiance emitters with integral microlens.

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64. Ueda Kazuhiko,JPX, Image pickup apparatus fabrication method thereof image pickup adaptor apparatus signal processing apparatus signal processing method thereof information processing apparatus and information processi.

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65. Bolken,Todd O.; Cobbley,Chad A., Image sensor packages.

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66. Yamamoto Takahiro,JPX ; Morimoto Tadashi,JPX, Inductor and production method thereof.

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67. Cheon Dang-Bin,KRX, Inductor including bonding wires.

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68. King Frederick David (Smith Falls CA) Springthorpe Anthony John (Richmond CA), Integral lens light emitting diode.

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69. Eberhardt Noel H. ; Vega Victor Allen, Integrated circuit assembly and method of assembly.

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70. Capps David F. (134 Moross Mt. Clemens MI 48043), Integrated circuit bus structure.

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71. Hayward James ; Nguyen Quang, Integrated circuit chip package and method of making the same.

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72. Parker Robert H. (Oakton VA) Pommer Richard J. (Canyon CA), Integrated circuit component package with integral passive component.

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73. Badehi, Avner, Integrated circuit device.

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74. Kossives Dean P. ; Lotfi Ashraf W. ; Schneemeyer Lynn F. ; Steigerwald Michael L. ; Van Dover R. Bruce, Integrated circuit having a micromagnetic device including a ferromagnetic core and method of manufacture therefor.

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75. Christensen Todd Alan ; Sheets ; II John Edward, Integrated circuit having integral decoupling capacitor.

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76. Utagikar, Ajit; Chong, Num-Kwee, Integrated circuit package with an IC chip and pads that dissipate heat away from the chip.

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77. Michael G. Kelly ; James-Yu Chang ; Gary Dean Sasser ; Andrew Arthur Hunter GB; Cheng-Cheng Chang, Integrated circuit packaging for optical sensor devices.

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78. Howser James H. ; Fowler Tom L., Integrated circuit with tightly coupled passive components.

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79. Harvey Ian Robert ; Ehman Michael Frederick ; Harvey Malcolm Randall ; Stephenson James Craig, Integrated inductive components and method of fabricating such components.

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80. Bernstein Jonathan (Medfield MA), Integrated liquid crystal acoustic transducer.

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81. Higashi Robert E. ; Ridley Jeffrey A. ; Stratton Thomas G. ; Wood R. Andrew, Integrated silicon vacuum micropackage for infrared devices.

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82. Mebane Janet E. (San Diego CA) Chan Lawrence W. (San Diego CA) La Duong T. (San Diego CA) Nevarez Ruben (San Diego CA), Interconnect lead frame for thermal ink jet printhead and methods of manufacture.

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83. Wojnarowski Robert John ; Whitmore Barry Scott, Interface structures for electronic devices.

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84. Wojnarowski Robert John ; Whitmore Barry Scott ; Gorowitz Bernard, Interface structures for electronic devices.

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85. Patrizio Broglia IT; Francesco Garbelli IT; Alberto Monti IT, Interposer for connecting two substrates and resulting assembly.

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86. Bischoff Peter G. ; Stovall Ross W, Interposer with embedded circuitry and method for using the same to package microelectronic units.

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87. Chu Jerome Tsu-Rong, Lateral high-Q inductor for semiconductor devices.

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88. Neil McLellan HK; Nelson Fan HK, Leadless plastic chip carrier with etch back pad singulation.

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89. Salatino Matthew M. ; Young William R. ; Begley Patrick A., Lid wafer bond packaging and micromachining.

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90. Yamanaka Haruyoshi (Takarazuka JPX) Kazumura Masaru (Takatsuki JPX), Light emitting diode and method of making the same.

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91. Sagawa Toshio (Hitachi JPX) Kurata Kazuhiro (Hachiouji JPX), Light emitting diode array chip and method of fabricating same.

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92. Tai Kawano JP; Hidetoshi Yarita JP; Kazuo Kobayashi JP, Light emitting display.

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93. Kawashima Ikue (Sendai JPX), Light emitting element, image sensor and light receiving element with linearly varying waveguide index.

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94. Hongyong Zhang JP; Noriko Uchida JP; Takatoshi Mayama JP; Tetsuya Kobayashi JP; Kazutaka Hanaoka JP; Seiji Tanuma JP; Yuichi Inoue JP, Liquid crystal display apparatus.

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95. Hem Takiar ; Ashok Prabhu ; Luu Nguyen, Low cost die sized module for imaging application having a lens housing assembly.

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96. Lee, Jin-Yuan; Lin, Mou-Shiung; Huang, Ching-Cheng, Low fabrication cost, fine pitch and high reliability solder bump.

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97. DiStefano Thomas H. (Monte Sereno CA) Smith John W. (Palo Alto CA) Karavakis Konstantine (Cupertino CA) Fjelstad Joseph (Sunnyvale CA), Manufacture of semiconductor connection components with frangible lead sections.

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98. Kong Alvin M. (Los Angeles CA) Lau James C. (Torrance CA) Chan Steven S. (Alhambra CA), Mass simultaneous sealing and electrical connection of electronic devices.

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99. Paniccia Mario J., Method and apparatus for cooling the backside of a semiconductor device using an infrared transparent heat slug.

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100. Nguyen Luu ; Prabhu Ashok ; Kelkar Nikhil ; Takiar Hem P., Method and apparatus for forming a plastic chip on chip package module.

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101. Welland David R. ; Pavelka John B. ; Healy Edmund G., Method and apparatus for synthesizing high-frequency signals utilizing on-package oscillator circuit inductors.

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102. Sasaki Tatsuya (Tokyo JPX) Mito Ikuo (Tokyo JPX) Katoh Tomoaki (Tokyo JPX), Method for fabricating an optical semiconductor device.

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103. Kim, Tae Hoon; Park, Chan Wang; Park, Joo Hun; Kim, Jae Myung, Method for fabricating surface acoustic wave filter packages.

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104. Vindasius Alfons ; Robinson Marc E. ; Scharrenberg William R., Method for forming conductive epoxy flip-chip on chip.

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105. Vindasius Alfons ; Sautter Kenneth M., Method for forming vertical interconnect process for silicon segments with dielectric isolation.

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106. Vindasius Alfons ; Sautter Kenneth M., Method for forming vertical interconnect process for silicon segments with thermally conductive epoxy preform.

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107. Ma, Ching-Tien; Chen, Tsung-Chuan; Hsu, Shew-Tsu, Method for forming via and contact holes with deep UV photoresist.

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108. Imai Takehiko (Yokohama JPX), Method for manufacturing a solid state image sensing device using transparent thermosetting resin layers.

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109. Halahan, Patrick B., Method for manufacturing a structure comprising a substrate with a cavity and a semiconductor integrated circuit bonded to a contact pad located in the cavity.

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110. Daniel Yap ; Phillip H. Lawyer, Method for manufacturing precision electroplated solder bumps.

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111. Najafi Nader ; Massoud-Ansari Sonbol, Method for packaging microsensors.

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112. Jean-Marc Bureau FR; Jacques Elziere FR; Daniel Le Bail FR; Christian Lelong FR; Ngoc-Tuan Nguyen FR, Method for the packaging of electronic components.

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113. Nelson Bradley H. (Austin TX), Method of assembling stacks of integrated circuit dies.

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114. Smith John W. ; Fjelstad Joseph, Method of fabricating a microelectronic assembly using sheets with gaps to define lead regions.

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115. Kovac Zlata (Los Gatos CA) Mitchell Craig (Santa Clara CA) Distefano Thomas H. (Monte Sereno CA) Smith John W. (Palo Alto CA), Method of fabricating compliant interface for semiconductor chip.

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116. Go ; deceased Tiong C. (late of El Toro CA by Jane C. Go ; executor) Minahan Joseph A. (Simi Valley CA) Shanken Stuart N. (Laguna Niguel CA), Method of fabricating electronic circuitry unit containing stacked IC layers having lead rerouting.

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117. Song Kwang Bok (Seoul KRX) Kim Sung Ki (Seoul KRX) Shim Jin Sub (Kyungki-do KRX), Method of fabricating solid state image sensing elements.

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118. Khandros Igor Y. ; Mathieu Gaetan L., Method of forming a resilient contact structure.

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119. Scott K. Pozder ; Harold A. Downey ; Thomas S. Kobayashi, Method of forming an alternative ground contact for a semiconductor die.

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120. Wojnarowski Robert John ; Rose James Wilson ; Paik Kyung Wook ; Gdula Michael, Method of forming thin film resistors on organic surfaces.

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121. Freyman Bruce J. ; Darveaux Robert F., Method of making a molded flex circuit ball grid array.

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122. DiStefano Thomas H. ; Grube Gary W. ; Khandros Igor Y. ; Mathieu Gaetan ; Sweis Jason ; Union Laurie ; Gibson David, Method of making connections to a semiconductor chip assembly.

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123. Yatsuda Hiromi,JPX ; Iijima Hiroaki,JPX ; Mineshima Nobuhiro,JPX, Method of making surface acoustic wave device.

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124. Baek Euy H. (Chungcheongbuk-do KRX), Method of manufacturing CCD image sensor by use of recesses.

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125. Nelson Gregory H. (Gilbert AZ), Method of manufacturing an interconnect device having coplanar contact bumps.

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126. Chance Randal W. (Boise ID), Method of manufacturing edge connected semiconductor die.

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127. Feldman Michael R. ; Kathman Alan D., Method of mass producing and packaging integrated optical subsystems.

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128. Wolfgang Pahl DE; Alois Stelzl DE; Hans Kruger DE, Method of producing a surface acoustic wave component.

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129. Randall Cha SG; Tae Jong Lee ; Alex See SG; Lap Chan ; Chua Chee Tee SG, Method to fabricate RF inductors with minimum area.

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130. Zilber, Gil; Katraro, Reuven; Aksenton, Julia; Oganesian, Vage, Methods and apparatus for packaging integrated circuit devices.

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131. Averkiou George ; Trask Philip A., Methods of fabricating an HDMI decal chip scale package.

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132. DiStefano Thomas H. ; Grube Gary W. ; Khandros Igor Y. ; Mathiew Gaetan, Methods of making semiconductor connection components with releasable load support.

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133. Richard C. Ruby ; Tracy E. Bell ; Frank S. Geefay ; Yogesh M. Desai, Microcap wafer-level package.

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134. Warner Michael ; Distefano Thomas H. ; Gibson David, Microelectronic bond ribbon design.

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135. Distefano Thomas H. (Monte Sereno CA) Kovac Zlata (Los Gatos CA) Grange John (Cupertino CA), Microelectronic bonding with lead motion.

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136. Haba Belgacem ; Raab Kurt, Microelectronic components with frangible lead sections.

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137. Smith John W. ; Distefano Thomas H., Microelectronic element bonding with deformation of leads in rows.

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138. Mitchell Craig ; Distefano Thomas H., Microelectronic encapsulation methods and equipment.

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139. DiStefano Thomas H. (Monte Sereno CA) Smith John W. (Palo Alto CA), Microelectronic mounting with multiple lead deformation and bonding.

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140. Distefano Thomas H., Microelectronic mounting with multiple lead deformation using restraining straps.

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141. Akram Salman ; Hembree David R. ; Farnworth Warren M., Micromachined chip scale package.

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142. Matloubian Mehran ; Macdonald Perry A. ; Rensch David B. ; Larson Lawrence E., Microwave/millimeter wave circuit structure with discrete flip-chip mounted elements.

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143. Matloubian Mehran (Encino CA) Macdonald Perry A. (Culver City CA) Rensch David B. (Thousand Oaks CA) Larson Lawrence E. (Bethesda MD), Microwave/millimeter wave circuit structure with discrete flip-chip mounted elements, and method of fabricating the same.

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144. Levy Aaron Uri ; Sprint John Patrick ; Forthun John Arthur ; Isaak Harlan Ruben ; Mearig Joel Andrew ; Calkins Mark Chandler, Modular panel stacking process.

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145. Bradley, Paul; Larson, III, John D.; Ruby, Richard C., Mounting film bulk acoustic resonators in microwave packages using flip chip bonding technology.

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146. Jao Jui-Meng,TWX ; Ko Eric,TWX ; Liu Vicky,TWX, Multi-chip integrated circuit package structure for central pad chip.

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147. Pedder David John,GB3, Multi-chip module inductor structure.

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148. Fang, Jen-Kuang, Multi-chip module packaging device using flip-chip bonding technology.

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149. Yu, Kevin; Huang, Chien-Ping; Chang, Che-Jung, Multimedia chip package.

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150. Hassan Hashemi ; Shiaw Chang ; Roger Forse ; Evan McCarthy ; Trang Trinh ; Thuy Tran, Multiple chip module with integrated RF capabilities.

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151. Gupta Debabrata (Scottsdale AZ) Drye James E. (Mesa AZ), Multiple integrated circuit module which simplifies handling and testing.

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152. Meade Robert (Somerville MA) Joannopoulos John (Belmont MA) Alerhand Oscar L. (Marlboro NJ), Optoelectronic integrated circuits and method of fabricating and reducing losses using same.

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153. Weale Gareth P.,CAX, Package with reticulated bond shelf.

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154. Badehi, Avner, Packaged integrated circuits and methods of producing thereof.

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155. Inoue Akira (Itami JPX), Packaged microwave semiconductor device.

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156. Ikuina Kazuhiro,JPX ; Shimada Yuzo,JPX ; Utsumi Kazuaki,JPX, Packaged semiconductor device and method of manufacturing the same.

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157. Degani Yinon (Highland Park NJ) Dudderar Thomas D. (Chatham NJ) Han Byung J. (Scotch Plains NJ) Lyons Alan M. (New Providence NJ) Tai King L. (Berkeley Heights NJ), Packaging multi-chip modules without wire-bond interconnection.

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158. Tourino, Cory G.; Rice, Janet L.; Flynn, Gregory, Packaging of MEMS devices using a thermoplastic.

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159. Siniaguine, Oleg; Savastiouk, Sergey, Packaging of integrated circuits and vertical integration.

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160. Tsukamoto Kenji,JPX, Packaging structure for a hermetically sealed flip chip semiconductor device.

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161. Carlson Randolph S. (Carson City NV), Packaging system for stacking integrated circuits.

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162. Pastore John R. (Leander TX) Nomi Victor K. (Round Rock TX) Wilson Howard P. (Austin TX), Pad array semiconductor device with thermal conductor and process for making the same.

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163. Hayashi Katsuhiko,JPX, Passive electronic parts, IC parts, and wafer.

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164. Stone David B. (Owego NY), Passive interposer including at least one passive electronic component.

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165. Glenn, Thomas P.; Jewler, Scott J.; Roman, David; Yee, Jae Hak; Moon, Doo Hwan, Plastic integrated circuit device package and method for making the package.

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166. Cho Steve T., Process for bonding a shell to a substrate for packaging a semiconductor.

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167. Bonis Maurice (Crolles FRX), Process for fabricating an integrated circuit using local silicide interconnection lines.

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168. Stoffel John L. (San Diego CA), Process for manufacturing thermal ink jet printhead and integrated circuit (IC) structures produced thereby.

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169. Rostoker Michael D. (San Jose CA) Pasch Nicholas F. (Pacifica CA), Process for solder ball interconnecting a semiconductor device to a substrate using a noble metal foil embedded interpos.

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170. Degani Yinon ; Smith Peter R. ; Tai King Lien, RF IC package.

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171. Huppenthal, Jon M.; Guzy, D. James, Reconfigurable processor module comprising hybrid stacked integrated circuit die elements.

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172. Johnson Gary Carl ; Anderson Michael J. ; Kennison Gregory Jon ; Christensen Jeffrey Eanes ; Popovich Mark Phillip, Saw device package and method.

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173. Mclellan Neil,HKX ; Fan Nelson,HKX, Saw-singulated leadless plastic chip carrier.

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174. Tanaka Haruo (Kyoto JPX), Semi-conductor laser unit.

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