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Nonplanar device with stress incorporation layer and method of fabrication 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/8238
  • H01L-021/70
출원번호 US-0173443 (2005-06-30)
발명자 / 주소
  • Hareland,Scott A.
  • Chau,Robert S.
  • Doyle,Brian S.
  • Datta,Suman
  • Jin,Been Yih
출원인 / 주소
  • Intel Corporation
대리인 / 주소
    Blakely, Sokoloff, Taylor & Zafman LLP
인용정보 피인용 횟수 : 88  인용 특허 : 72

초록

초록이 없습니다.

대표청구항

대표청구항이 없습니다.

이 특허에 인용된 특허 (72)

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  3. Beintner, Jochen; Ludwig, Thomas; Nowak, Edward Joseph, Dense chevron finFET and method of manufacturing same.
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  5. Pillarisetty, Ravi; Hudait, Mantu K.; Radosavljevic, Marko; Dewey, Gilbert; Rakshit, Titash; Kavalieros, Jack T., Double quantum well structures for transistors.
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  6. Lee, Tung Ying; Huang, Yu-Lien; Lin, You-Ru, FETS and methods of forming FETS.
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  7. Lee, Tung Ying; Huang, Yu-Lien; Lin, You-Ru, FETs and methods of forming FETs.
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  8. Radosavljevic, Marko; Datta, Suman; Doyle, Brian S.; Kavalieros, Jack; Brask, Justin K.; Doczy, Mark L.; Majumdar, Amian; Chau, Robert S., Field effect transistor with metal source/drain regions.
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  9. Chau, Robert S.; Datta, Suman; Kavalieros, Jack; Brask, Justin K.; Doczy, Mark L.; Metz, Matthew, Field effect transistor with narrow bandgap source and drain regions and method of fabrication.
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  10. Chau, Robert S.; Datta, Suman; Kavalieros, Jack; Brask, Justin K.; Doczy, Mark L.; Metz, Matthew, Field effect transistor with narrow bandgap source and drain regions and method of fabrication.
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  11. Chau, Robert S.; Datta, Suman; Kavalieros, Jack; Brask, Justin K.; Doczy, Mark L.; Metz, Matthew, Field effect transistor with narrow bandgap source and drain regions and method of fabrication.
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