이 특허에 인용된 특허 (119) 인용/피인용 타임라인 분석

1. Schemmel Floyd F. (Sherman TX), Adjustable probe for probe assembly.

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2. Mathieu Gaetan L., Apparatus for controlling plating over a face of a substrate.

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3. Dabrowiecki Krzysztof ; Kister January ; Lobacz Jerzy, Assembly structure for making integrated circuit chip probe cards.

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4. Pedder David John,GBX, Bare die testing.

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5. DiStefano Thomas H. ; Kovac Zlata ; Smith John W., Bondable compliant pads for packaging of a semiconductor chip and method therefor.

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6. Chang Sung Chul ; Khandros Igor Y. ; Smith William D., Chip-scale carrier for semiconductor devices including mounted spring contacts.

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7. Gilleo Kenneth B. ; Grube Gary W. ; Mathieu Gaetan, Compliant semiconductor chip assemblies and methods of making same.

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8. Lin Paul T. (Austin TX), Composite flip chip semiconductor device with an interposer having test contacts formed along its periphery.

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9. Khandros Igor Y. ; Mathieu Gaetan L., Composite interconnection element for microelectronic components, and method of making same.

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10. Fogal Rich ; Wood Alan G., Condensed memory matrix.

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11. DiStefano Thomas H. ; Grube Gary W. ; Khandros Igor Y. ; Mathieu Gaetan ; Sweis Jason ; Union Laurie ; Gibson David, Connection components with frangible leads and bus.

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12. Khandros Igor Y. ; Eldridge Benjamin N. ; Mathieu Gaetan L. ; Dozier Thomas H. ; Smith William D., Contact carriers (tiles) for populating larger substrates with spring contacts.

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13. Long Tom (Portland OR) Sabri Mohamed (Beaverton OR) Saunders J. Lynn (Hillsboro OR), Contact device for making connection to an electronic circuit device.

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14. Khandros Igor Y. ; Mathieu Gaetar L., Contact structure device for interconnections, interposer, semiconductor assembly and package using the same and method.

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15. Vaynkof Yakov F. (Woodland Hills CA) Zimmermann Karl F. (Agoura CA) Shorter Jerry W. (Camarillo CA) Bond Joseph K. (Newbury Park CA), Contactor with elastomer encapsulated probes.

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16. Sarma Dwadasi H. R. (West Lafayette IN) Palanisamy Ponnusamy (Kokomo IN) Hearn John A. (Kokomo IN) Schwarz Dwight L. (Kokomo IN), Controlled adhesion conductor.

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17. Feigenbaum Haim (Irvine CA) Crumly William R. (Anaheim CA) Schreiber Christopher M. (Newport Beach CA), Electrical connections with shaped contacts.

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18. Eldridge Benjamin N. ; Khandros Igor Y. ; Mathieu Gaetan L. ; Pedersen David V., Electronic components with terminals and spring contact elements extending from areas which are remote from the terminals.

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19. Khandros Igor Y. ; Eldridge Benjamin N. ; Mathieu Gaetan L., Fabricating interconnects and tips using sacrificial substrates.

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20. Distefano Thomas ; Smith John W. ; Faraci Anthony B., Fixtures and methods for lead bonding and deformation.

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21. Tighe Thomas S., Flex cable connector for cryogenic application.

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22. Distefano Thomas H. ; Fjelstad Joseph, Flexible contact post and post socket and associated methods therefor.

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23. Khandros Igor Y. ; Mathieu Gaetan L., Flexible contact structure with an electrically conductive shell.

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24. Hembree David R. ; Farnworth Warren M. ; Wark James M., Force applying probe card and test system for semiconductor wafers.

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25. Ardezzone Frank J. (Santa Clara CA), High density probe-head with isolated and shielded transmission lines.

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26. Little Michael J. (Woodland Hills CA), Integrated circuit spring contact fabrication methods.

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27. Beaman, Brian Samuel; Fogel, Keith Edward; Lauro, Paul Alfred; Shih, Da-Yuan, Integrated compliant probe for wafer level test and burn-in.

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28. Mathieu, Gaetan L.; Eldridge, Benjamin N., Interconnect for microelectronic structures with enhanced spring characteristics.

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29. Khandros Igor Y. ; Mathieu Gaetan L., Interconnection substrates with resilient contact structures on both sides.

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30. McHugh Robert G. ; Lin Nick,TWX ; Tan Hanchen ; Wang Jwomin,TWX, Land grid array connector having a floating housing.

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31. Beroz Masud ; Haba Belgacem ; Pickett Christopher M., Lead formation usings grids.

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32. Mathieu Gaetan L. ; Eldridge Benjamin N. ; Grube Gary W., Lithographic contact elements.

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33. Eldridge Benjamin N. ; Grube Gary W. ; Khandros Igor Y. ; Mathieu Gaetan L., Making discrete power connections to a space transformer of a probe card assembly.

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34. Crumly William R. (Anaheim CA), Membrane connector with stretch induced micro scrub.

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35. Crumly William R. (Anaheim CA), Membrane connector with stretch induced micro scrub.

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36. Eldridge Benjamin N. ; Khandros Igor Y. ; Mathieu Gaetan L., Method and apparatus for applying a layer of flowable coating material to a surface of an electronic component.

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37. Mathieu Gaetan L., Method and apparatus for controlling plating over a face of a substrate.

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38. Christopher L. Chua ; David K. Fork ; Patrick G. Kim ; Linda Romano, Method and apparatus for interconnecting devices using an adhesive.

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39. Chua Christopher L. ; Fork David K. ; Kim Patrick G. ; Romano Linda, Method and apparatus for interconnecting devices using an adhesive.

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40. Fork, David Kirtland, Method for fabricating a metal plated spring structure.

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41. Romano, Linda T.; Fork, David K.; Ackler, Harold, Method for fabricating a spring structure.

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42. Elder Richard A. (Dallas TX) Wilson Arthur M. (Dallas TX) Bagen Susan V. (Dallas TX) Miller Juanita G. (Richardson TX), Method for fabrication of probe card for testing of semiconductor devices.

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43. Smith Donald Leonard ; Alimonda Andrew Sebastian, Method for forming a spring contact.

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44. Eldridge Benjamin N. ; Grube Gary W. ; Khandros Igor Y. ; Mathieu Gaetan L., Method of burning-in semiconductor devices.

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45. Eldridge Benjamin N. ; Grube Gary W. ; Khandros Igor Y. ; Mathieu Gaetan L., Method of exercising semiconductor devices.

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46. DiStefano Thomas H. ; Smith John W. ; Kovac Zlata ; Karavakis Konstantine, Method of forming compliant microelectronic mounting device.

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47. Woith Blake F. (Orange CA) Pasiecznik ; Jr. John (Malibu CA) Crumly William R. (Anaheim CA) Betz Robert K. (Long Beach CA), Method of making a cast elastomer/membrane test probe assembly.

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48. Solberg Vernon, Method of making a compliant multichip package.

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49. Smith John W. ; DiStefano Thomas H., Method of making chip mountings and assemblies.

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50. Eldridge Benjamin N. ; Grube Gary W. ; Khandros Igor Y. ; Mathieu Gaetan L., Method of making contact tip structures.

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51. Eldridge Benjamin N. ; Khandros Igor Y. ; Mathieu Gaetan L. ; Pedersen David V., Method of making microelectronic spring contact elements.

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52. Greenman Norman L. ; Hernandez Jorge M. ; Panicker M. P. Ramachandra, Method of making microwave circuit package.

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53. Khandros Igor Y., Method of making raised contacts on electronic components.

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54. Eldridge Benjamin N. ; Grube Gary W. ; Khandros Igor Y. ; Mathieu Gaetan L., Method of making temporary connections between electronic components.

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55. Yasunaga, Masatoshi; Kimura, Michitaka; Yamada, Satoshi, Method of manufacturing a packaged semiconductor device, and a semiconductor device manufactured thereby.

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56. Khandros Igor Y. (Peekskil NY), Method of manufacturing electrical contacts, using a sacrificial member.

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57. Eldridge Benjamin N. ; Grube Gary W. ; Khandros Igor Y ; Mathieu Gaetan L., Method of modifying the thickness of a plating on a member by creating a temperature gradient on the member, applications for employing such a method, and structures resulting from such a method.

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58. DiStefano Thomas H. ; Karavakis Gus ; Kovac Zlata ; Mitchell Craig, Method of mounting a connection component on a semiconductor chip with adhesives.

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59. Berg William E. (Portland OR), Method of mounting a substrate structure to a circuit board.

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60. Khandros Igor Y., Method of mounting free-standing resilient electrical contact structures to electronic components.

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61. Eldridge Benjamin N. ; Grube Gary W. ; Khandros Igor Y. ; Mathieu Gaetan L., Method of mounting resilient contact structures to semiconductor devices.

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62. Spierings Gijsbertus A.C.M.,NLX ; Heijboer Willem L.C.M.,NLX ; Remeeus Leo O.,NLX, Method of photolithographically metallizing at least the inside of holes arranged in accordance with a pattern in a plat.

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63. Eldridge Benjamin N. ; Grube Gary W. ; Khandros Igor Y. ; Mathieu Gaetan L., Method of planarizing tips of probe elements of a probe card assembly.

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64. Khandros Igor Y. ; Mathieu Gaetan L., Method of stacking electronic components.

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65. Eldridge Benjamin N. ; Grube Gary W. ; Khandros Igor Y. ; Mathieu Gaetan L., Method of temporarily, then permanently, connecting to a semiconductor device.

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66. Eldridge Benjamin N. ; Grube Gary W. ; Khandros Igor Y. ; Mathieu Gaetan L., Method of testing semiconductor.

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67. Budnaitis John J. ; Leong Jimmy, Method of wafer level burn-in.

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68. Liang Louis H. (10601 Creston Dr. Los Altos CA 94024-7420), Methods and apparatus for test and burn-in of integrated circuit devices.

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69. Fjelstad Joseph, Methods for manufacturing a semiconductor package having a sacrificial layer.

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70. Distefano Thomas H. ; Mitchell Craig S., Methods of encapsulating a semiconductor chip using a settable encapsulant.

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71. Distefano Thomas H. ; Smith ; Jr. John W., Methods of making connections to a microelectronic unit.

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72. Roch Jacques Leon (San Jose CA), Micro-circuit test apparatus.

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73. Mei, Ping; Sun, Decai; Street, Robert A., Microelectromechanical system based sensors, sensor arrays, sensing systems, sensing methods and methods of fabrication.

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74. Warner Michael ; Distefano Thomas H. ; Gibson David, Microelectronic bond ribbon design.

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75. Bellaar Pieter H.,NLX ; DiStefano Thomas H. ; Fjelstad Joseph ; Pickett Christopher M. ; Smith John W., Microelectronic component with rigid interposer.

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76. DiStefano Thomas H. ; Smith John W., Microelectronic mounting with multiple lead deformation and bonding.

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77. Akram Salman ; Hembree David R. ; Wood Alan G., Micromachined probe card having compliant contact members for testing semiconductor wafers.

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78. Kloth James Albert (North St. Petersburg FL), Miniature electrical connector for parallel panel members.

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79. Eldridge Benjamin N. ; Grube Gary W. ; Khandros Igor Y. ; Mathieu Gaetan L., Mounting spring elements on semiconductor devices.

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80. Ibrahim Shawki (Lafayette IN) Elsner James E. (Lafayette IN), Multi-layer ceramic package.

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81. Noguchi Etsuo (Mitaka JPX), Multiprobing semiconductor test method for testing a plurality of chips simultaneously.

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82. Iwasaki Hidekazu,JPX ; Matsunaga Hiroshi,JPX ; Ohkubo Takehiko,JPX, Partly replaceable device for testing a multi-contact integrated circuit chip package.

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83. Smith Donald L. (Palo Alto CA) Alimonda Andrew S. (Los Altos CA), Photolithographically patterned spring contact.

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84. Smith Donald Leonard ; Alimonda Andrew Sebastian, Photolithographically patterned spring contact.

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85. Smith Donald Leonard ; Alimonda Andrew Sebastian, Photolithographically patterned spring contact.

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86. Smith Donald Leonard ; Alimonda Andrew Sebastian, Photolithographically patterned spring contact.

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87. Smith Donald Leonard ; Alimonda Andrew Sebastian, Photolithographically patterned spring contact.

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88. Smith Donald L. ; Thornton Robert L. ; Chua Christopher L. ; Fork David K., Photolithographically patterned spring contact and apparatus and methods for electrically contacting devices.

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89. Iino Shinji (Yamanashi-ken JPX) Iida Itaru (Yamanashi-ken JPX), Probe apparatus having burn-in test function.

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90. McQuade Francis T. (Watertown CT) Lander Jack (Danbury CT), Probe assembly for testing integrated circuits.

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91. Eldridge Benjamin N. ; Grube Gary W. ; Khandros Igor Y. ; Mathieu Gaetan L., Probe card assembly and kit, and methods of using same.

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92. Higgins H. Dan ; Pandey Rajiv ; Armendariz Norman J. ; Bates R. Dennis, Probe card assembly for high density integrated circuits.

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93. Okubo Kazumasa (Kanagawa JPX) Okubo Masao (Nishinomiya JPX) Yoshimitsu Yasuro (Takatsuki JPX) Sugaya Kiyoshi (Amagasaki JPX), Probe card in which contact pressure and relative position of each probe end are correctly maintained.

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94. Pasiecznik ; Jr. John (Malibu CA), Probe for jesting an electrical circuit chip.

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95. Suppelsa Anthony B. (Coral Springs FL) Mullen ; III William B. (Boca Raton FL) Urbish Glenn F. (Coral Springs FL), Selectively releasing conductive runner and substrate assembly.

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96. Banerji Kingshuk (Plantation FL) Suppelsa Anthony B. (Coral Springs FL) Mullen ; III. William B. (Boca Raton FL), Selectively releasing conductive runner and substrate assembly having non-planar areas.

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97. Smith John W., Semiconductor chip package with dual layer terminal and lead structure.

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98. Smith John W. ; Pickett Christopher M., Semiconductor package assemblies with moisture vents.

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99. Dozier ; II Thomas H. ; Eldridge Benjamin N. ; Grube Gary W. ; Khandros Igor Y. ; Mathieu Gaetan L. ; Pedersen David V. ; Stadt Michael A., Sockets for "springed" semiconductor devices.

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100. Dozier, II, Thomas H.; Eldridge, Benjamin N.; Grube, Gary W.; Khandros, Igor Y.; Mathieu, Gaetan L.; Pedersen, David V.; Stadt, Michael A., Sockets for "springed" semiconductor devices.

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101. Dozier ; II Thomas H. ; Eldridge Benjamin N. ; Grube Gary W. ; Khandros Igor Y. ; Mathieu Gaetan L., Sockets for electronic components and methods of connecting to electronic components.

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102. Dozier ; II Thomas H. ; Khandros Igor Y., Solder preforms.

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103. David Kirtland Fork ; Jackson Ho ; Rachel King-ha Lau ; JengPing Lu, Spring structure with self-aligned release material.

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104. Fork David Kirtland ; Ho Jackson ; Lau Rachel King-ha ; Lu JengPing, Spring structure with self-aligned release material.

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105. Khandros Igor Y. ; Pedersen David V., Stacking semiconductor devices, particularly memory chips.

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106. Pedder David John,GBX, Structure for testing bare integrated circuit devices.

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107. Grabbe Dimitry G. (Middletown PA) Korsunsky Iosif (Harrisburg PA) Ringler Daniel R. (Elizabethville PA), Surface mount electrical connector.

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108. Divis Jan J.,CAX ; Patton Franklin D.,CAX, System for individual inflation and deflation of borehole packers.

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109. Beaman Brian Samuel ; Fogel Keith Edward ; Lauro Paul Alfred ; Norcott Maurice Heathcote ; Shih Da-Yuan ; Walker George Frederick, Test probe for high density integrated circuits, methods of fabrication thereof and methods of use thereof.

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110. Distefano Thomas H., Thermally enhanced packaged semiconductor assemblies.

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111. Mueller Robert A. (Portland OR), Thin-film electrothermal device.

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112. Marcus Robert B. ; Kadija Igor V. ; Aharonov Robert Reuven, Ultra-miniature electrical contacts and method of manufacture.

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113. Mitchell Craig S. ; Distefano Thomas H., Vacuum dispense method for dispensing an encapsulant and machine therefor.

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114. Budnaitis John J., Wafer level burn-in base unit substrate and assembly.

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115. Hsu Howard, Wafer probe card.

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116. Khandros Igor Y. ; Pedersen David V., Wafer-level burn-in and test.

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117. Khandros, Igor Y.; Pedersen, David V., Wafer-level burn-in and test.

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118. Eldridge Benjamin N. ; Grube Gary W. ; Khandros Igor Y. ; Mathieu Gaetan L., Wafer-level test and burn-in, and semiconductor process.

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119. Patrick G. Kim ; Donald L. Smith ; Andrew S. Alimonda, Wear-resistant spring contacts.

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이 특허를 인용한 특허 (27) 인용/피인용 타임라인 분석

1. Dozier, II, Thomas H.; Eldridge, Benjamin N.; Hsu, David H.; Khandros, Igor Y.; Miller, Charles A., Apparatus and method of testing singulated dies.

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2. Dozier, II, Thomas H.; Eldridge, Benjamin N.; Hsu, David S.; Khandros, Igor Y.; Miller, Charles A., Apparatus and method of testing singulated dies.

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3. Lee, Chang-Ming; Liu, Wen-Fang; Huang, Shih-Jung; Su, Ling-Kai, Connector and manufacturing method thereof.

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4. Long,David C.; Brodsky,William L.; Miller,Jason S.; Torok,John G.; Zitz,Jeffrey A., Elastomer interposer with voids in a compressive loading system.

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5. Light, David Noel; Kalakkad, Dinesh Sundararajan; Nguyen, Peter Tho, Electrical connector and method of making it.

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6. Alladio, Patrick J, Electronic device test fixture.

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7. Bottoms, Wilmer R.; Chong, Fu Chiung; Mok, Sammy; Modlin, Douglas, High density interconnect system for IC packages and interconnect assemblies.

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8. Chong, Fu Chiung; Kao, Andrew; McKay, Douglas; Litza, Anna; Modlin, Douglas; Mok, Sammy; Parekh, Nitin; Swiatowiec, Frank John; Shan, Zhaohui, High density interconnect system having rapid fabrication cycle.

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9. Lupashku, Mirtcha; Herschmann, Jacob; Krieger, Gedaliahoo, Integrated unit for electrical/reliability testing with improved thermal control.

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10. Lee, Hsiao-Wen; Sun, Chih-Hsuan; Yeh, Wei-Yu, Light emitting diode light bar module with electrical connectors formed by injection molding.

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11. Lee, Hsiao-Wen; Sun, Chih-Hsuan; Yeh, Wei-Yu, Light emitting diode light bar module with electrical connectors formed by injection molding.

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12. Wang, Chuan-Wei; Lee, Sheng-Ta; Hsu, Hsin-Hui, MEMS device and MEMS spring element.

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13. Chong, Fu Chiung; Mok, Sammy, Massively parallel interface for electronic circuit.

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14. Chong,Fu Chiung; Mok,Sammy, Massively parallel interface for electronic circuit.

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15. Pai,Deepak, Method and apparatus for compliantly connecting stack of high-density electronic modules in harsh environments.

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16. Sugiura, Masahiro; Hiyama, Kunio; Ogino, Susumu, Method for manufacturing a probe unit.

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17. Detor, Andrew Joseph; Corderman, Reed; Keimel, Christopher; Aimi, Marco, Method of forming a micro-electromechanical system device.

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18. Boyapati, Sri Ranga Sai; Zhang, Qinglei, Methods of forming substrate microvias with anchor structures.

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19. Boyapati, Sri Ranga Sai; Zhang, Qinglei, Methods of forming substrate microvias with anchor structures.

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20. Hantschel,Thomas; Kosgalwies,Sven; Fork,David K.; Chow,Eugene M., Self-releasing spring structures and methods.

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21. Colgan,Evan George; Coteus,Paul W.; Harrer,Hubert; Hougham,Gareth Geoffrey; Magerlein,John Harold; Torok,John, Space transforming land grid array interposers.

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22. Cole, David R.; McIver, Allan D.; Burdon, Ian; Hancox, Christopher N., Spring power contact having non-linear slot.

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23. Cole, David R.; McIver, Allan D.; Burdon, Ian; Hancox, Christopher N., Spring power contact having non-linear slot.

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25. Foote, Steven A., Systems and methods for affixing a silicon device to a support structure.

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26. Mok, Sammy; Chong, Fu Chiung; Milter, Roman, Systems for testing and packaging integrated circuits.

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27. Dong,Wen Chang, Thin film with MEMS probe circuits and MEMS thin film probe head using the same.

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