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Three dimensional programmable device and method for fabricating the same 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-047/00
  • H01L-029/06
  • H01L-029/02
  • H01L-031/00
출원번호 US-0231974 (2002-08-30)
발명자 / 주소
  • Lowrey,Tyler A.
출원인 / 주소
  • Intel Corporation
대리인 / 주소
    Trop, Pruner & Hu, P.C.
인용정보 피인용 횟수 : 56  인용 특허 : 35

초록

초록이 없습니다.

대표청구항

대표청구항이 없습니다.

이 특허에 인용된 특허 (35)

  1. Reinberg Alan R., Chalcogenide memory cell with a plurality of chalcogenide electrodes.
    상세보기
  2. Reinberg Alan R., Chalcogenide memory cell with a plurality of chalcogenide electrodes.
    상세보기
  3. Forbes Leonard ; Noble Wendell P., Circuit and method for an open bit line memory cell with a vertical transistor and trench plate trench capacitor.
    상세보기
  4. Tyler A. Lowrey ; Daniel Xu ; Chien Chiang ; Patrick J. Neschleba, Compositionally modified resistive electrode.
    상세보기
  5. Harshfield Steven T., Contact structure and memory element incorporating the same.
    상세보기
  6. Reinberg Alan R., Electrical and thermal contact for use in semiconductor devices.
    상세보기
  7. Ovshinsky Stanford R. (Bloomfield Hills MI) Czubatyj Wolodymyr (Warren MI) Ye Quiyi (Rochester MI) Strand David A. (West Bloomfield MI) Hudgens Stephen J. (Southfield MI), Electrically erasable, directly overwritable, multibit single cell memory elements and arrays fabricated therefrom.
    상세보기
  8. Wolstenholme Graham R. ; Gonzalez Fernando ; Zahorik Russell C., Memory cell incorporating a chalcogenide element.
    상세보기
  9. Wolstenholme Graham R. ; Gonzalez Fernando ; Zahorik Russell C., Memory cell incorporating a chalcogenide element and method of making same.
    상세보기
  10. Wolstenholme Graham R. ; Gonzalez Fernando ; Zahorik Russell C., Memory cell incorporating a chalcogenide element and method of making same.
    상세보기
  11. Klersy Patrick ; Pashmakov Boil ; Czubatyj Wolodymyr ; Kostylev Sergey ; Ovshinsky Stanford R., Memory element with energy control mechanism.
    상세보기
  12. Ovshinsky Standford R. ; Czubatyj Wolodymyr ; Strand David A. ; Klersy Patrick J. ; Kostylev Sergey ; Pashmakov Boil, Memory element with memory material comprising phase-change material and dielectric material.
    상세보기
  13. Greason Jeffrey K. ; Grumbling Daniel R., Memory test mode for wordline resistive defects.
    상세보기
  14. Chiang, Chien; Lee, Jong-Won; Klersy, Patrick, Metal structure for a phase-change memory device.
    상세보기
  15. Gonzalez Fernando ; Turi Raymond A., Method for fabricating an array of ultra-small pores for chalcogenide memory cells.
    상세보기
  16. Gonzalez Fernando ; Turi Raymond A., Method for fabricating an array of ultra-small pores for chalcogenide memory cells.
    상세보기
  17. Fernando Gonzalez ; Gurtej S. Sandhu ; Mike P. Violette, Method for forming conductors in semiconductor devices.
    상세보기
  18. Teo Yeow Meng,SGX, Method for forming contacts and vias with improved barrier metal step-coverage.
    상세보기
  19. Sogo Marilyn R. (San Diego CA), Method of forming a metal interconnect structure for integrated circuits.
    상세보기
  20. Sandhu Gurtej S., Method of forming a polysilicon diode and devices incorporating such diode.
    상세보기
  21. Sandhu Gurtej S., Method of forming a polysilicon diode and devices incorporating such diode.
    상세보기
  22. Wolstenholme Graham R. ; Gonzalez Fernando ; Zahorik Russell C., Method of making memory cell incorporating a chalcogenide element.
    상세보기
  23. Chiang, Chien; Wicker, Guy C., Method to enhance performance of thermal resistor device.
    상세보기
  24. Chiang, Chien; Wicker, Guy C., Method to enhance performance of thermal resistor device.
    상세보기
  25. Dennison, Charles H., Phase change memory device on a planar composite layer.
    상세보기
  26. Newns, Dennis M.; Tsuei, Chang C., Quantum computing with d-wave superconductors.
    상세보기
  27. Guy C. Wicker, Reduced contact area of sidewall conductor.
    상세보기
  28. Wicker, Guy C., Reduced contact area of sidewall conductor.
    상세보기
  29. Reinberg Alan R. ; Zahorik Russell C., Small electrode for a chalcogenide switching device and method for fabricating same.
    상세보기
  30. Shanks Roy R. (San Diego CA), Thin film memory device employing amorphous semiconductor materials.
    상세보기
  31. Tyler Lowrey, Three-dimensional (3D) programmable device.
    상세보기
  32. Ovshinsky Stanford R. ; Pashmakov Boil, Universal memory element with systems employing same and apparatus and method for reading, writing and programming same.
    상세보기
  33. Lowrey, Tyler A.; Dennison, Charles H., Utilizing atomic layer deposition for programmable device.
    상세보기
  34. Gonzalez Fernando ; Lowrey Tyler A. ; Doan Trung Tri ; Turi Raymond A. ; Wolstenholme Graham R., Vertical diode structures with low series resistance.
    상세보기
  35. Agre Jonathan R. ; Clare Loren P. ; Marcy ; 5th Henry O. ; Twarowski Allen J. ; Kaiser William ; Mickelson Wilmer A. ; Yakos Michael D. ; Loeffelholz Christian J. ; Engdahl Jonathan R., Wireless integrated sensor network using multiple relayed communications.
    상세보기

이 특허를 인용한 특허 (56)

  1. Liu, Jun, Array of nonvolatile memory cells having at least five memory cells per unit cell, having a plurality of the unit cells which individually comprise three elevational regions of programmable material, and/or having a continuous volume having a combination of a plurality of vertically oriented memory cells and a plurality of horizontally oriented memory cells; array of vertically stacked tiers of nonvolatile memory cells.
    상세보기
  2. Liu, Jun, Arrays of nonvolatile memory cells and methods of forming arrays of nonvolatile memory cells.
    상세보기
  3. Liu, Jun, Arrays of nonvolatile memory cells and methods of forming arrays of nonvolatile memory cells.
    상세보기
  4. Liu, Jun, Arrays of nonvolatile memory cells and methods of forming arrays of nonvolatile memory cells.
    상세보기
  5. Liu, Zengtao T.; Wells, David H., Arrays of nonvolatile memory cells and methods of forming arrays of nonvolatile memory cells.
    상세보기
  6. Sandhu, Gurtej S.; Tang, Sanh D., Arrays of vertically stacked tiers of non-volatile cross point memory cells.
    상세보기
  7. Sandhu, Gurtej S.; Tang, Sanh D., Arrays of vertically stacked tiers of non-volatile cross point memory cells and methods of reading a data value stored by an array of vertically stacked tiers of non-volatile cross point memory cells.
    상세보기
  8. Sandhu, Gurtej S.; Tang, Sanh D., Arrays of vertically stacked tiers of non-volatile cross point memory cells, methods of forming arrays of vertically stacked tiers of non-volatile cross point memory cells, and methods of reading a data value stored by an array of vertically stacked tiers of non-volatile cross point memory cells.
    상세보기
  9. Tang, Sanh D.; Sandhu, Gurtej S., Arrays of vertically stacked tiers of non-volatile cross point memory cells, methods of forming arrays of vertically stacked tiers of non-volatile cross point memory cells, and methods of reading a data value stored by an array of vertically stacked tiers of non-volatile cross point memory cells.
    상세보기
  10. Tang, Sanh D.; Sandhu, Gurtej S., Arrays of vertically stacked tiers of non-volatile cross point memory cells, methods of forming arrays of vertically stacked tiers of non-volatile cross point memory cells, and methods of reading a data value stored by an array of vertically stacked tiers of non-volatile cross point memory cells.
    상세보기
  11. Tang, Sanh D.; Sandhu, Gurtej S., Arrays of vertically stacked tiers of non-volatile cross point memory cells, methods of forming arrays of vertically stacked tiers of non-volatile cross point memory cells, and methods of reading a data value stored by an array of vertically stacked tiers of non-volatile cross point memory cells.
    상세보기
  12. Asano, Isamu; Lowrey, Tyler A., Electrically rewritable non-volatile memory element and method of manufacturing the same.
    상세보기
  13. Elkins, Patricia C.; Moore, John T.; Klein, Rita J., Electroless plating of metal caps for chalcogenide-based memory devices.
    상세보기
  14. Ramaswamy, D. V. Nirmal; Prall, Kirk D., Electronic devices, memory devices and memory arrays.
    상세보기
  15. Ang,Kern Huat, Fabrication methods for memory cells.
    상세보기
  16. Weis, Rolf; Happ, Thomas, Integrated circuit including U-shaped access device.
    상세보기
  17. Weis, Rolf; Happ, Thomas, Integrated circuit including U-shaped access device.
    상세보기
  18. Liu, Jun; Zahurak, John K., Integrated circuitry comprising nonvolatile memory cells and methods of forming a nonvolatile memory cell.
    상세보기
  19. Liu, Jun; Zahurak, John K., Integrated circuitry comprising nonvolatile memory cells having platelike electrode and ion conductive material layer.
    상세보기
  20. Liu, Zengtao T., Memory arrays.
    상세보기
  21. Liu, Zengtao T., Memory arrays.
    상세보기
  22. Liu, Zengtao T., Memory arrays.
    상세보기
  23. Liu, Zengtao T., Memory arrays.
    상세보기
  24. Liu, Zengtao T., Memory arrays.
    상세보기
  25. Sandhu, Gurtej, Memory cell array with semiconductor selection device for multiple memory cells.
    상세보기
  26. Sandhu, Gurtej, Memory cell array with semiconductor selection device for multiple memory cells.
    상세보기
  27. Sandhu, Gurtej, Memory cell array with semiconductor selection device for multiple memory cells.
    상세보기
  28. Liu, Jun, Memory cells, memory cell programming methods, memory cell reading methods, memory cell operating methods, and memory devices.
    상세보기
  29. Liu, Jun, Memory cells, memory cell programming methods, memory cell reading methods, memory cell operating methods, and memory devices.
    상세보기
  30. Liu, Jun, Memory cells, memory cell programming methods, memory cell reading methods, memory cell operating methods, and memory devices.
    상세보기
  31. Liu, Jun, Memory cells, memory cell programming methods, memory cell reading methods, memory cell operating methods, and memory devices.
    상세보기
  32. Liu, Jun; Sandhu, Gurtej S., Memory cells, methods of forming memory cells, and methods of programming memory cells.
    상세보기
  33. Liu, Jun; Sandhu, Gurtej S., Memory cells, methods of forming memory cells, and methods of programming memory cells.
    상세보기
  34. Liu, Jun; Sandhu, Gurtej S., Memory cells, methods of forming memory cells, and methods of programming memory cells.
    상세보기
  35. Meade, Roy E.; Srinivasan, Bhaskar; Sandhu, Gurtej S., Memory cells, methods of programming memory cells, and methods of forming memory cells.
    상세보기
  36. Liu, Jun, Memory device constructions, memory cell forming methods, and semiconductor construction forming methods.
    상세보기
  37. Liu, Jun, Memory device constructions, memory cell forming methods, and semiconductor construction forming methods.
    상세보기
  38. Shim, Byung Sup, Memory devices having diodes and resistors electrically connected in series.
    상세보기
  39. Sinha, Nishant; Smythe, John; Srinivasan, Bhaskar; Sandhu, Gurtej S.; Greeley, Joseph Neil; Parekh, Kunal R., Methods of forming a non-volatile resistive oxide memory cell and methods of forming a non-volatile resistive oxide memory array.
    상세보기
  40. Sinha, Nishant; Smythe, John; Srinivasan, Bhaskar; Sandhu, Gurtej S.; Greeley, Joseph Neil; Parekh, Kunal R., Methods of forming a non-volatile resistive oxide memory cell and methods of forming a non-volatile resistive oxide memory array.
    상세보기
  41. Sills, Scott E.; Sandhu, Gurtej S., Methods of forming a nonvolatile memory cell and methods of forming an array of nonvolatile memory cells.
    상세보기
  42. Sills, Scott E.; Sandhu, Gurtej S., Methods of forming a nonvolatile memory cell and methods of forming an array of nonvolatile memory cells.
    상세보기
  43. Sills, Scott E.; Sandhu, Gurtej S., Methods of forming a nonvolatile memory cell and methods of forming an array of nonvolatile memory cells array of nonvolatile memory cells.
    상세보기
  44. Liu, Jun, Methods of forming memory device constructions, methods of forming memory cells, and methods of forming semiconductor constructions.
    상세보기
  45. Srinivasan, Bhaskar; Sandhu, Gurtej; Smythe, John, Methods of forming non-volatile memory cells having multi-resistive state material between conductive electrodes.
    상세보기
  46. Srinivasan, Bhaskar; Sandhu, Gurtej; Smythe, John, Non-volatile resistive oxide memory cells and methods of forming non-volatile resistive oxide memory cells.
    상세보기
  47. Smythe, John; Srinivasan, Bhaskar; Sandhu, Gurtej, Non-volatile resistive oxide memory cells, non-volatile resistive oxide memory arrays, and methods of forming non-volatile resistive oxide memory cells and memory arrays.
    상세보기
  48. Smythe, John; Srinivasan, Bhaskar; Sandhu, Gurtej S., Non-volatile resistive oxide memory cells, non-volatile resistive oxide memory arrays, and methods of forming non-volatile resistive oxide memory cells and memory arrays.
    상세보기
  49. Liu, Zengtao T.; Wells, David H., Nonvolatile memory cells and arrays of nonvolatile memory cells.
    상세보기
  50. Ramaswamy, Nirmal; Sandhu, Gurtej, Nonvolatile memory cells and methods of forming nonvolatile memory cell.
    상세보기
  51. Ramaswamy, D. V. Nirmal; Sandhu, Gurtej S., Nonvolatile memory cells and methods of forming nonvolatile memory cells.
    상세보기
  52. Ramaswamy, D. V. Nirmal; Sandhu, Gurtej S., Nonvolatile memory cells and methods of forming nonvolatile memory cells.
    상세보기
  53. Meade, Roy E.; Srinivasan, Bhaskar; Sandhu, Gurtej S., Resistive memory cells with two discrete layers of programmable material, methods of programming memory cells, and methods of forming memory cells.
    상세보기
  54. Liu, Jun, Semiconductor construction forming methods.
    상세보기
  55. Sandhu, Gurtej; Mouli, Chandra; Zahurak, John K., Vertically-oriented semiconductor selection device for cross-point array memory.
    상세보기
  56. Sandhu, Gurtej; Mouli, Chandra; Zahurak, John K., Vertically-oriented semiconductor selection device for cross-point array memory.
    상세보기

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