Integrated circuit device packages and substrates for making the packages
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
H01L-023/495
H01L-023/48
출원번호
US-0986634
(2004-11-12)
등록번호
US-7253503
(2007-08-07)
발명자
/ 주소
Fusaro,James M.
Darveaux,Robert F.
Rodriguez,Pablo
출원인 / 주소
Amkor Technology, Inc.
대리인 / 주소
Stetina Brunda Garred & Brucker
인용정보
피인용 횟수 :
83인용 특허 :
288
초록▼
Integrated circuit device packages and substrates for making the packages are disclosed. One embodiment of a substrate includes a planar sheet of polyimide having a first surface, an opposite second surface, and apertures between the first and second surfaces. A planar metal die pad and planar metal
Integrated circuit device packages and substrates for making the packages are disclosed. One embodiment of a substrate includes a planar sheet of polyimide having a first surface, an opposite second surface, and apertures between the first and second surfaces. A planar metal die pad and planar metal are attached to the second surface of the polyimide sheet. The apertures in the polyimide sheet are juxtaposed to the leads. A package made using the substrate includes an integrated circuit device mounted above the first surface of the polyimide sheet opposite the die pad. Bond wires are connected between the integrated circuit device and the leads through the apertures in the polyimide sheet. An encapsulant material covers the first surface of the polyimide sheet, the integrated circuit device, the bone wires, and the apertures. The die pad and leads are exposed at an exterior surface of the package.
대표청구항▼
The invention claimed is: 1. A substrate for making a flip chip integrated circuit package, the substrate comprising: a nonconductive sheet defining opposed first and second sheet surfaces, an exposed peripheral side, and a plurality of conductive vias extending between the first and second sheet s
The invention claimed is: 1. A substrate for making a flip chip integrated circuit package, the substrate comprising: a nonconductive sheet defining opposed first and second sheet surfaces, an exposed peripheral side, and a plurality of conductive vias extending between the first and second sheet surfaces; a die pad defining opposed first and second die pad surfaces, the first die pad surface being attached to the second sheet surface; a plurality of leads each defining opposed first and second lead surfaces and opposed first and second lead ends, the first lead surface of each of the leads being attached to the second sheet surface such that the leads at least partially circumvent the die pad, the second lead end of each of the leads being substantially coplanar with the peripheral side of the sheet; and a plurality of traces disposed on the first sheet surface, each of the traces having a first trace end which is substantially coplanar with the peripheral side of the sheet and a second trace end which terminates in a metal land, each of the traces being electrically connected to a respective one of the leads by a respective one of the conductive vias which each electrically communicate with a respective one of the traces between the first and second trace ends thereof. 2. The substrate of claim 1 wherein at least one of the traces is electrically connected to the die pad by at least one of the conductive vias. 3. The substrate of claim 2 wherein: each of the traces defines a land; and the electrical connection of the die pad to at least one of the traces is facilitated by at least one of the conductive vias which extends through the conductive sheet from the first die pad surface to a respective one of the lands. 4. The substrate of claim 1 wherein: each of the traces defines opposed first and second trace surfaces, the second trace surface of each of the traces being attached to the first sheet surface; and each of the lead is electrically connected to a respective one of the traces by a conductive via which extends through the nonconductive sheet from the first lead surface to the second trace surface. 5. The substrate of claim 4 wherein at least a portion of the first trace surface of each of the traces is covered by a solder mask. 6. The substrate of claim 1 further comprising an elongate strip attached to the second sheet surface and extending between the die pad and at least one of the leads. 7. A substrate for making a flip chip integrated circuit package, the substrate comprising: a nonconductive sheet defining an exposed peripheral side; a die pad attached to the sheet; a plurality of leads each defining opposed first and second lead ends, each of the leads being attached to the sheet such that the leads at least partially circumvent the die pad, the second lead end of each of the leads being substantially coplanar with the peripheral side of the sheet; and a plurality of traces disposed on the sheet, each of the traces having a first trace end which is substantially coplanar with the peripheral side of the sheet and a second trace end which terminates in a metal land, each of the traces being electrically connected to a respective one of the leads by respective ones of a plurality of conductive vias which each electrically communicate with a respective one of the traces between the first and second trace ends thereof. 8. The substrate of claim 7 wherein at least one of the traces is electrically connected to the die pad. 9. The substrate of claim 8 wherein the electrical connection of the die pad to at least one of the traces is facilitated by a conductive via which extends through the nonconductive sheet from the first die pad surface to a respective one of the lands. 10. The substrate of claim 7 wherein: each of the traces define opposed first and second trace surfaces, the second trace surface of each of the traces being attached to the first sheet surface; and each of the leads is electrically connected to a respective one of the traces by a conductive via which extends through the nonconductive sheet from the first lead surface to the second trace surface. 11. The substrate of claim 10 wherein at least a portion of the first trace surface of each of the traces is covered by a solder mask. 12. The substrate of claim 7 further comprising an elongate strip attached to the second sheet surface and extending between the die pad and at least one of the leads. 13. A substrate for making a flip chip integrated circuit package, the substrate comprising: a nonconductive sheet defining opposed first and second sheet surfaces, an exposed peripheral side, and a plurality of conductive vias extending between the first and second sheet surfaces; a plurality of leads each defining opposed first and second lead surfaces and opposed first and second lead ends, the first lead surface of each of the leads being attached to the second sheet surface such that the second lead end of each of the leads is substantially coplanar with the peripheral side of the sheet; and a plurality of traces disposed on the first sheet surface, each of the traces having a first trace end which is substantially coplanar with the peripheral side of the sheet and a second trace end which terminates in a metal land, each of the traces being electrically connected to a respective one of the leads by a respective one of the conductive vias which each electrically communicate with a respective one of the traces between the first and second trace ends thereof. 14. The substrate of claim 13 wherein: each of the traces defines opposed first and second trace surfaces, the second trace surface of each of the traces being attached to the first sheet surface; and each of the leads is electrically connected to a respective one of the traces by a conductive via which extends through the nonconductive sheet from the first lead surface to the second trace surface. 15. The substrate of claim 14 wherein at least a portion of the first trace surface of each of the traces is covered by a solder mask. 16. A substrate for making a flip chip integrated circuit package, the substrate comprising: a planar nonconductive sheet having a first surface, an opposite second surface, an exposed peripheral side, and a plurality of metallized vias extending between the first surface and the second surface; a planar metal die pad, wherein the die pad has a first surface attached to the second surface of the nonconductive sheet; a plurality of planar metal leads each having a first surface, a first lead end, and a second lead end disposed in opposed relation to the first lead end, wherein the first surface of each lead is attached to the second surface of the nonconductive sheet, the first lead end of each of the leads is adjacent to the die pad, and the second lead end of each of the leads is substantially coplanar with the peripheral side of the sheet; and a plurality of metallizations on the first surface of the nonconductive sheet, wherein each metallization has a first end which is substantially coplanar with the peripheral side of the sheet and a second end which terminates in a metal land of the metallization, each of the metallizations being conductively connected to the first surface of a respective one of the leads by a metallized via through the nonconductive sheet which electrically communicates with a respective one of the metallizations between the first end and the land thereof. 17. The substrate of claim 16, wherein the die pad is conductively connected to a metallization on the first surface of the nonconductive sheet by a metallized via through the nonconductive sheet. 18. The substrate of claim 1 wherein the first lead end of each of the leads is adjacent to the die pad. 19. The substrate of claim 7 wherein the first lead end of each of the leads is adjacent to the die pad.
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