초록 ▼

An improved start-up circuit and method for self-bias circuits is described that applies a start-up voltage and current to a self-bias circuit to initialize its operation in its desired stable state. Once the self-bias circuit converges to its desired state of operation a start-up voltage reference

An improved start-up circuit and method for self-bias circuits is described that applies a start-up voltage and current to a self-bias circuit to initialize its operation in its desired stable state. Once the self-bias circuit converges to its desired state of operation a start-up voltage reference/voltage clamping circuit shuts off current flow to the self-bias circuit and the start-up circuit enters a low power mode of operation to reduce its overall current and power draw. This allows for embodiments of the present invention to be utilized in portable and/or low power devices where low power consumption is of increased importance. In one embodiment of the present invention, a band-gap voltage reference circuit is initiated utilizing a start-up circuit.

대표청구항 ▼

What is claimed is: 1. A start-up circuit, comprising: a current mirror; a start-up voltage reference coupled to a first output of the current mirror and to ground, the startup voltage reference comprising a plurality of coupled BJT transistors, a plurality of PN junction diodes, a plurality of Sch

What is claimed is: 1. A start-up circuit, comprising: a current mirror; a start-up voltage reference coupled to a first output of the current mirror and to ground, the startup voltage reference comprising a plurality of coupled BJT transistors, a plurality of PN junction diodes, a plurality of Schottky diodes, a plurality of diodes, a plurality of diode connected metal oxide semiconductor (MOS) transistors, a plurality of diode connected field effect transistors (FET), a plurality of resistors, or a resistor voltage divider; and an output transistor coupled between a second output of the current mirror and an output of the start-up circuit, wherein an input of the output transistor is coupled to the first output of the current mirror and the start-up voltage reference and where the output transistor is controlled by the voltage difference between a voltage output of the start-up voltage reference and a voltage of the output of the start-up circuit; wherein the start-up circuit is adapted to turn off when the voltage of the output of the start-up circuit is greater than the start-up voltage reference. 2. The start-up circuit of claim 1, wherein the second output of the current mirror is adapted to control the current flow of the outputs of the current mirror. 3. The start-up circuit of claim 1, wherein the current mirror further comprises: a first and second P-FET transistor, wherein a drain of the first P-FET transistor is coupled to the first output of the current mirror, a drain of the second P-FET transistor is coupled to the second output of the current mirror and to a gate of the first and second P-FET transistors. 4. A start-up circuit, comprising: a current mirror; a start-up voltage reference coupled to a first output of the current mirror; and an output transistor coupled between a second output of the current mirror and an output of the start-up circuit, wherein an input of the output transistor is coupled to the first output of the current mirror and the start-up voltage reference and where the output transistor is controlled by the voltage difference between a voltage output of the start-up voltage reference and a voltage of the output of the start-up circuit, wherein the current mirror further comprises a first and a second P-FET transistor, wherein a drain of the first P-FET transistor is coupled to the first output of the current mirror, a drain of the second P-FET transistor is coupled to the second output of the current mirror and to a gate of the first and second P-FET transistors, and wherein the first and second P-FET transistors are selected to have differing threshold voltages (Vtp). 5. The start-up circuit of claim 1, wherein the start-up voltage reference further comprises one or more diode coupled BJT transistors, one or more PN junction diodes, one or more Schottky diodes, one or more zener diodes, one or more diode connected metal oxide semiconductor (CMOS) transistors, one or more diode connected field effect transistors (FET), one or more resistors, and a resistor voltage divider. 6. The start-up circuit of claim 1, wherein the start-up voltage reference is selectively adjustable. 7. The start-up circuit of claim 1, wherein the output transistor is a N-FET transistor. 8. A self-bias circuit, comprising: a feedback-controlled circuit having two or more stable states of operation, wherein the feedback controlled circuit contains a central circuit where current can be injected to bootstrap the feedback-controlled circuit into a desired state of operation; and a start-up circuit having an output, wherein the output is coupled to the central circuit, the start-up circuit comprising, a current mirror, a start-up voltage reference coupled to a first output of the current mirror and to a lower power rail; an output transistor coupled between a second output of the current mirror and the output of the start-up circuit, wherein an input of the output transistor is coupled to the first output of the current mirror and the start-up voltage reference and where the output transistor is controlled by the voltage difference between a voltage of the start-up voltage reference and a voltage of the central circuit; and a capacitor coupled between the second output and a low power rail. 9. The self-bias circuit of claim 8, wherein the second output of the current mirror is adapted to control the current flow of the outputs of the current mirror. 10. The self-bias circuit of claim 8, wherein the current mirror further comprises: a first and second P-FET transistor, wherein a drain of the first P-FET transistor is coupled to the first output of the current mirror, a drain of the second P-FET transistor is coupled to the second output of the current mirror and to a gate of the first and second P-FET transistors. 11. A self-bias circuit, comprising: a feedback-controlled circuit having two or more stable states of operation, wherein the feedback controlled circuit contains a central circuit where current can be injected to bootstrap the feedback-controlled circuit into a desired state of operation; and a start-up circuit having an output, wherein the output is coupled to the central circuit, the start-up circuit comprising, a current mirror, a start-up voltage reference coupled to a first output of the current mirror, and an output transistor coupled between a second output of the current mirror and the output of the start-up circuit, wherein an input of the output transistor is coupled to the first output of the current mirror and the start-up voltage reference and where the output transistor is controlled by the voltage difference between a voltage of the start-up voltage reference and a voltage of the central circuit, wherein the current mirror further comprises: a first and second P-FET transistor, wherein a drain of the first P-FET transistor is coupled to the first output of the current mirror, a drain of the second P-FET transistor is coupled to the second output of the current mirror and to a gate of the first and second P-FET transistors, and wherein the first and second P-FET transistors are selected to have differing threshold voltages (Vtp). 12. The self-bias circuit of claim 8, wherein the start-up voltage reference further comprises one or more diode coupled BJT transistors, one or more PN junction diodes, one or more Schottky diodes, one or more zener diodes, one or more diode connected metal oxide semiconductor (MOS) transistors, one or more diode connected field effect transistors (FET), one or more resistors, and a resistor voltage divider. 13. The self-bias circuit of claim 8, wherein the start-up voltage reference is selectively adjustable. 14. The self-bias circuit of claim 8, wherein the output transistor is a N-FET transistor. 15. The self-bias circuit of claim 8, wherein the self-bias circuit is one of band-gap voltage reference circuit, a current reference, a A/D converter, a D/A converter, and a feedback circuit. 16. A start-up circuit, comprising: a means for providing a mirrored current having a first and second outputs, wherein the current flowing from the second output controls the current flowing from the first output; a means for providing a start-up voltage reference coupled to a first output of the current mirror means; means for capacitively coupling gates of transistors of the current mirror to a low power rail during power up, wherein the means for capacitively coupling gates of transistors of the current mirror to a low power rail is selected; and means for selectively coupling the second output of the current mirror means to an output of the start-up circuit, wherein the means for selectively coupling the second output of the current mirror means has a control means coupled to the first output of the current mirror means and is controlled by difference between a voltage of the start-up voltage reference means and a voltage of the output. 17. The start-up circuit of claim 16, wherein the means for providing a mirrored current has differing current sources such that the first output has a means for shutting off current flow before the second output.