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특허 상세정보

Capping of metal interconnects in integrated circuit electronic devices

특허상세정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판) H01L-021/44    H01L-021/02   
미국특허분류(USC) 438/653; 438/656; 438/659; 438/672; 438/674
출원번호 US-0867346 (2004-06-14)
등록번호 US-7268074 (2007-09-11)
발명자 / 주소
출원인 / 주소
대리인 / 주소
    Senniger Powers
인용정보 피인용 횟수 : 4  인용 특허 : 40
초록

A multilayer metal cap over a metal-filled interconnect feature in a dielectric layer for incorporation into a multilayer integrated circuit device, and a method for forming the cap.

대표
청구항

What is claimed is: 1. A method for forming a multilayer metal cap over a metal-filled interconnect feature in a dielectric layer for incorporation into a multilayer integrated circuit device comprising: depositing a first metal cap layer having a thickness between about 100 and about 300 angstroms over the metal-filled interconnect feature in a first deposition process which constitutes electroless metal deposition from a first electroless solution comprising a source of Co ions and a reducing agent; depositing a second metal cap layer over the first m...

이 특허에 인용된 특허 (40)

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  9. Inoue, Hiroaki; Nakamura, Kenji; Matsumoto, Moriji; Ezawa, Hirokazu; Miyata, Masahiro; Tsujimura, Manabu. Electroless Ni--B plating liquid, electronic device and method for manufacturing the same. USP2004036706422.
  10. Ting Chiu H. (Saratoga CA) Paunovic Milan (Port Washington NY). Electroless deposition for IC fabrication. USP1992125169680.
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