초록 ▼

A charge pump for generating an arbitrary voltage level includes "M" pieces of pump units PUi and "M+1" pieces of first switches Sj. The pump unit PUi includes a first terminal Ni,1 coupled to a reference voltage Vi,1, a second terminal Ni,2 coupled to a reference voltage Vi,2, a third terminal Ni,3

A charge pump for generating an arbitrary voltage level includes "M" pieces of pump units PUi and "M+1" pieces of first switches Sj. The pump unit PUi includes a first terminal Ni,1 coupled to a reference voltage Vi,1, a second terminal Ni,2 coupled to a reference voltage Vi,2, a third terminal Ni,3, a fourth terminal Ni,4 and at least one capacitor Ci. Ci is charged by Vi,1 and Vi,2 during a first period, and a voltage is provided from Ni,4 by Ci according to a voltage at Ni,3 during a second period. The first switch Sj is adapted for electrically connecting the first terminal and the second terminal during the second period. The first and second terminals of Sk is coupled to Nk-1,4 and Nk,3, respectively. The first terminal of S1 receives the input voltage and the second terminal of SM+1 outputs the output voltage.

대표청구항 ▼

What is claimed is: 1. A charge pump adapted for generating an output voltage having an arbitrary voltage level according to an input voltage and at least one reference voltage, the charge pump comprising: M pieces of pump units PUi, wherein PUi represents the ith pump unit, "i" being an integer wh

What is claimed is: 1. A charge pump adapted for generating an output voltage having an arbitrary voltage level according to an input voltage and at least one reference voltage, the charge pump comprising: M pieces of pump units PUi, wherein PUi represents the ith pump unit, "i" being an integer which is greater than 0 and smaller than or equal to M, M being an integer which is greater than or equal to 1, the pump unit PUi comprising: a first terminal Ni,1, coupled to a reference voltage Vi,1, wherein Ni,1 represents the first terminal of PUi and Vi,1 represents the voltage coupled to Ni,1; a second terminal Ni,2, coupled to a reference voltage Vi,2, wherein Ni,2 represents the second terminal of PUi and Vi,2 represents the voltage coupled to Ni,2; a third terminal Ni,3, wherein Ni,3 represents the third terminal of PUi; a fourth terminal Ni,4, wherein Ni,4 represents the fourth terminal of PUi; and at least one capacitor Ci, wherein Ci represents an internal capacitor or capacitors of PUi, the pump unit PUi being adapted for charging C1 with Vi,1 and Vi,2 in a first period, and providing a voltage to Ni,4 according to the voltage level of Ni,3 in a second period; "M+1" pieces of first switches Sj, wherein Sj represents the jth first switch, "j" being an integer which is greater than 0 and smaller than or equal to "M+1"; Sj is adapted for electrically connecting the first terminal and the second terminal thereof during the second period, wherein the first terminal of S1 receives the input voltage and the second terminal of S1 is coupled to N1,3; the first terminal of Sk is coupled to Nk-1,4 and the second terminal of Sk is coupled to Nk,3; the first terminal of SM+1 is coupled to NM,4 and the second terminal of SM+1 outputs the output voltage, wherein "k" is an integer which is greater than 1 and smaller than or equal to "M"; and a voltage regulator for providing and regulating the reference voltage Vi,1 and Vi,2, wherein, when Vi,1>Vi,2, the output voltage is larger than the input voltage, on the contrary, when Vi,1i,2, the output voltage is smaller than the input voltage, the output voltage being the sum of the input voltage and M pieces of voltage differences ΔVi in which ΔVi represents the ith voltage difference and ΔVi=Vi,1-Vi,2. 2. The charge pump as claimed in claim 1, wherein the first switch Sj is one of a group consisting of NMOS transistors, PMOS transistors, transmission gates or a combination of such components. 3. The charge pump as claimed in claim 1, wherein the pump unit PUi further comprises: a second switch SWi,h, SWi,h representing the "hth" second switch of the pump unit PUi, wherein "h" is 1 or 2, for electrically conducting the first terminal and the second terminal during the first period, wherein the first terminal of SWi,1 is Ni,1, the second terminal of SWi,1 is coupled to the first terminal of Ci and the first terminal of SWi,2 is coupled to the second terminal of Ci; the second terminal of SWi,2 is Ni,2; the first terminal of Ci is Ni,4; and the second terminal of Ci is Ni,3. 4. The charge pump as claimed in claim 3, wherein the second switch SWi,h is one of a group consisting of NMOS transistors, PMOS transistors, transmission gates or a combination of such components. 5. The charge pump as claimed in claim 1, further comprising a voltage regulator coupled to the first terminal of the first switch S1 for providing and adjusting the input voltage. 6. The charge pump as claimed in claim 1, wherein the input voltage is provided by a power source voltage or a ground voltage. 7. The charge pump as claimed in claim 1, wherein the reference voltages Vi,1 and Vi,2 are provided by a power source voltage or a voltage regulator. 8. The charge pump as claimed in claim 1, further comprising a retaining circuit coupled to the second terminal of the first switch SM+1 for retaining the output voltage. 9. The charge pump as claimed in claim 8, wherein the retaining circuit comprises an output capacitor, the output capacitor being coupled between the second terminal of the first switch SM+1 and a ground. 10. A voltage converting method adapted for generating an output voltage having an arbitrary voltage level according to an input voltage and at least one reference voltage, the voltage converting method comprises: providing M pieces of reference voltage Vi,1 and M pieces of reference voltage Vi,2, where i being an integer which is greater than 0 and smaller than or equal to M, M being an integer which is greater than or equal to 1; adjusting the voltage level of the Vi,1 and Vi,2 to result the Vi,1 is greater than the Vi,2 or the Vi,1 is less than the Vi,2; obtaining M pieces of voltage differences according to the voltage difference between the Vi,1 and Vi,2; and accumulating said M pieces of voltage differences to produce the output voltage based on the input voltage. 11. The voltage converting method as claimed in claim 10, further comprises: adjusting the voltage level of the input voltage. 12. The voltage converting method as claimed in claim 10, wherein M pieces of voltage difference are represented by ΔV1˜ΔVM, ΔVi is equal to the Vi,1 subtract from the Vi,2. 13. The voltage converting method as claimed in claim 10, wherein the steps of "accumulating said M pieces of voltage difference to produce the output voltage based on the input voltage" comprises: a. selecting one of M pieces of voltage difference as a specific voltage difference; b. adding the input voltage and the specific voltage difference; and c. judging whether all voltage difference are sequentially selected, wherein if all voltage difference are not sequentially selected, one voltage difference among the unselected voltage differences is selected as the specific voltage difference, and repeating steps of b and c; and if all voltage differences have been sequentially selected, making the accumulated input voltage as the output voltage. 14. A charge pump adapted for generating an output voltage having a voltage level corresponding to an input voltage and at least one reference voltage, the charge pump comprising: M pieces of pump units PUi, wherein PUi represents the ith pump unit, "i" being an integer which is greater than 0 and smaller than or equal to M, M being an integer which is greater than or equal to 1, the pump unit PUi comprising: a first terminal Ni,1, coupled to a reference voltage Vi,1, wherein Ni,1 represents the first terminal of PUi and Vi,1 represents the voltage coupled to Ni,1; a second terminal Ni,2, coupled to a reference voltage Vi,2, wherein Ni,2 represents the second terminal of PUi and Vi,2 represents the voltage coupled to Ni,2; a third terminal Ni,3, wherein Ni,3 represents the third terminal of PUi; a fourth terminal Ni,4, wherein Ni,4 represents the fourth terminal of PUi; and at least one capacitor Ci, wherein Ci represents an internal capacitor or capacitors of PUi, the pump unit PUi being adapted for charging Ci with Vi,1 and Vi,2 in a first period, and providing a voltage to Ni,4 according to the voltage level of Ni,3 in a second period; "M+1" pieces of first switches Sj, wherein Sj represents the jth first switch, "j" being an integer which is greater than 0 and smaller than or equal to "M+1"; Sj is adapted for electrically connecting the first terminal and the second terminal thereof during the second period, wherein the first terminal of S1 receives the input voltage and the second terminal of S1 is coupled to N1,3; the first terminal of Sk is coupled to Nk-1,4 and the second terminal of Sk is coupled to Nk,3; the first terminal of SM+1 is coupled to NM,4 and the second terminal of SM+1 outputs the output voltage, wherein "k" is an integer which is greater than 1 and smaller than or equal to "M"; and a voltage regulator, for providing and regulating the reference voltage Vi,1 and Vi,2, wherein, when Vi,1>Vi,2, the output voltage is larger than the input voltage, on the contrary, when Vi,1i,2, the output voltage is smaller than the input voltage, the output voltage being the sum of the input voltage and M pieces of voltage differences ΔVi in which Δ Vi represents the ith voltage difference and ΔVi=Vi,1-Vi,2. 15. The charge pump as claimed in claim 14, wherein the first switch Sj is one of a group consisting of NMOS transistors, PMOS transistors, transmission gates or a combination of such components. 16. The charge pump as claimed in claim 1, wherein the pump unit PUi further comprises: a second switch SWi,h, SWi,h representing the "hth" second switch of the pump unit PUi, wherein "h" is 1 or 2, for electrically conducting the first terminal and the second terminal during the first period, wherein the first terminal of SWi,1 is Ni,1, the second terminal of SWi,1 is coupled to the first terminal of Ci and the first terminal of SWi,2 is coupled to the second terminal of Ci; the second terminal of SWi,2 is Ni,2; the first terminal of Ci is Ni,4; and the second terminal of Ci is Ni,3. 17. The charge pump as claimed in claim 16, wherein the second switch SWi,h is one of a group consisting of NMOS transistors, PMOS transistors, transmission gates or a combination of such components. 18. The charge pump as claimed in claim 14, further comprising a voltage regulator coupled to the first tenninal of the first switch S1 for providing and adjusting the input voltage. 19. The charge pump as claimed in claim 14, wherein the input voltage is provided by a power source voltage or a ground voltage. 20. The charge pump as claimed in claim 14, wherein the reference voltages Vi,1 and Vi,2 are provided by a power source voltage or a voltage regulator. 21. The charge pump as claimed in claim 14, further comprising a retaining circuit coupled to the second terminal of the first switch SM+1 for retaining the output voltage. 22. The charge pump as claimed in claim 21, wherein the retaining circuit comprises an output capacitor, the output capacitor being coupled between the second terminal of the first switch SM+1 and a ground. 23. A voltage converting method adapted for generating an output voltage having a voltage level corresponding to an input voltage and at least one reference voltage, the voltage converting method comprises: providing M pieces of reference voltage Vi,1 and M pieces of reference voltage Vi,2, where i being an integer which is greater than 0 and smaller than or equal to M, M being an integer which is greater than or equal to 1; adjusting the voltage level of the Vi,1 and Vi,2 to result the Vi,1 is greater than the Vi,2 or the Vi,1 is less than the Vi,2; obtaining M pieces of voltage differences according to the voltage difference between the Vi,1 and Vi,2; and accumulating said M pieces of voltage differences to produce the output voltage based on the input voltage. 24. The voltage converting method as claimed in claim 23, further comprises: adjusting the voltage level of the input voltage. 25. The voltage converting method as claimed in claim 23, wherein M pieces of voltage difference are represented by ΔV1˜ΔVM, ΔVi is equal to the Vi,1 subtract from the Vi,2. 26. The voltage converting method as claimed in claim 23, wherein the steps of "accumulating said M pieces of voltage difference to produce the output voltage based on the input voltage" comprises: a. selecting one of M pieces of voltage difference as a specific voltage difference; b. adding the input voltage and the specific voltage difference; and c. judging whether all voltage difference are sequentially selected, wherein if all voltage difference are not sequentially selected, one voltage difference among the unselected voltage differences is selected as the specific voltage difference, and repeating steps of b and c; and if all voltage differences have been sequentially selected, making the accumulated input voltage as the output voltage.